[AMDGPU] Use function attribute for post-ra

Author: harrisonGPU

llvm/include/llvm/CodeGen/TargetSubtargetInfo.h

@@ -16,7 +16,6 @@
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringRef.h"
-#include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MacroFusion.h"
 #include "llvm/CodeGen/PBQPRAConstraint.h"
 #include "llvm/CodeGen/SchedulerRegistry.h"

llvm/lib/Target/AMDGPU/AMDGPUFeatures.td

@@ -6,10 +6,6 @@
 //
 //===----------------------------------------------------------------------===//
 
-defvar TopDown       = [{ MISched::TopDown }];
-defvar BottomUp      = [{ MISched::BottomUp }];
-defvar Bidirectional = [{ MISched::Bidirectional }];
-
 def FeatureFP64 : SubtargetFeature<"fp64",
   "FP64",
   "true",
@@ -57,21 +53,3 @@ def FeaturePromoteAlloca : SubtargetFeature <"promote-alloca",
   "true",
   "Enable promote alloca pass"
 >;
-
-def FeaturePostRATopDown : SubtargetFeature <"postra-top-down",
- "PostRASchedDirection",
-  TopDown,
-  "Force Post-RA scheduler to run top-down"
->;
-
-def FeaturePostRABottomUp : SubtargetFeature <"postra-bottom-up",
-  "PostRASchedDirection",
-  BottomUp,
-  "Force Post-RA scheduler to run bottom-up"
->;
-
-def FeaturePostRABidirectional : SubtargetFeature <"postra-bidirectional",
-  "PostRASchedDirection",
-  Bidirectional,
-  "Force Post-RA scheduler to run bidirectionally"
->;

llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h

@@ -15,7 +15,6 @@
 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUSUBTARGET_H
 
 #include "llvm/ADT/SmallVector.h"
-#include "llvm/CodeGen/MachineScheduler.h"
 #include "llvm/IR/CallingConv.h"
 #include "llvm/Support/Alignment.h"
 #include "llvm/TargetParser/Triple.h"
@@ -81,7 +80,6 @@ class AMDGPUSubtarget {
   unsigned LocalMemorySize = 0;
   unsigned AddressableLocalMemorySize = 0;
   char WavefrontSizeLog2 = 0;
-  MISched::Direction PostRASchedDirection = MISched::TopDown;
 
 public:
   AMDGPUSubtarget(Triple TT);
@@ -384,10 +382,6 @@ class AMDGPUSubtarget {
   AMDGPUDwarfFlavour getAMDGPUDwarfFlavour() const;
 
   virtual ~AMDGPUSubtarget() = default;
-
-  MISched::Direction getPostRASchedDirection() const {
-    return PostRASchedDirection;
-  }
 };
 
 } // end namespace llvm

llvm/lib/Target/AMDGPU/GCNSubtarget.cpp

@@ -346,9 +346,8 @@ void GCNSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
 }
 
 void GCNSubtarget::overridePostRASchedPolicy(MachineSchedPolicy &Policy,
-                                             const MachineBasicBlock &MBB,
-                                             unsigned NumRegionInstr) const {
-  const Function &F = MBB.getParent()->getFunction();
+                                             const SchedRegion &Region) const {
+  const Function &F = Region.RegionBegin->getMF()->getFunction();
   Attribute PostRADirectionAttr = F.getFnAttribute("amdgpu-post-ra-direction");
   if (!PostRADirectionAttr.isValid())
     return;
@@ -370,39 +369,19 @@ void GCNSubtarget::overridePostRASchedPolicy(MachineSchedPolicy &Policy,
             PostRADirectionStr);
     F.getContext().diagnose(Diag);
   }
-  // }
-
-  // switch (getPostRASchedDirection()) {
-  // case MISched::TopDown:
-  //   Policy.OnlyTopDown = true;
-  //   Policy.OnlyBottomUp = false;
-  //   break;
-  // case MISched::BottomUp:
-  //   Policy.OnlyTopDown = false;
-  //   Policy.OnlyBottomUp = true;
-  //   break;
-  // case MISched::Bidirectional:
-  //   Policy.OnlyTopDown = false;
-  //   Policy.OnlyBottomUp = false;
-  //   break;
-  // default:
-  //   break;
-  // }
-
-  // LLVM_DEBUG({
-  //   const char *DirStr = "topdown";
-  //   switch (getPostRASchedDirection()) {
-  //   case MISched::BottomUp:
-  //     DirStr = "bottomup";
-  //     break;
-  //   case MISched::Bidirectional:
-  //     DirStr = "bidirectional";
-  //     break;
-  //   default:
-  //     break;
-  //   }
-  //   dbgs() << "Post-MI-sched direction: " << DirStr << '\n';
-  // });
+
+  LLVM_DEBUG({
+    const char *DirStr = "default";
+    if (Policy.OnlyTopDown && !Policy.OnlyBottomUp)
+      DirStr = "topdown";
+    else if (!Policy.OnlyTopDown && Policy.OnlyBottomUp)
+      DirStr = "bottomup";
+    else if (!Policy.OnlyTopDown && !Policy.OnlyBottomUp)
+      DirStr = "bidirectional";
+
+    dbgs() << "Post-MI-sched direction (" << F.getName() << "): " << DirStr
+           << '\n';
+  });
 }
 
 void GCNSubtarget::mirFileLoaded(MachineFunction &MF) const {

llvm/lib/Target/AMDGPU/GCNSubtarget.h

@@ -1042,8 +1042,7 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
                            const SchedRegion &Region) const override;
 
   void overridePostRASchedPolicy(MachineSchedPolicy &Policy,
-                                 const MachineBasicBlock &MBB,
-                                 unsigned NumRegionInstr) const override;
+                                 const SchedRegion &Region) const override;
 
   void mirFileLoaded(MachineFunction &MF) const override;
 

llvm/test/CodeGen/AMDGPU/postra-sched-attribute.ll

@@ -0,0 +1,34 @@
+; REQUIRES: asserts
+
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -debug-only=gcn-subtarget < %s 2>&1 | FileCheck %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 < %s 2>&1 | FileCheck -check-prefixes=WARNING %s
+
+; CHECK: Post-MI-sched direction (postra-sched-topdown): topdown
+define float @postra-sched-topdown(float %input) nounwind #0 {
+  %x = fadd float %input, 1.000000e+00
+  ret float %x
+}
+
+; CHECK: Post-MI-sched direction (postra-sched-bottomup): bottomup
+define float @postra-sched-bottomup(float %input) nounwind #1 {
+  %x = fsub float %input, 1.000000e+00
+  ret float %x
+}
+
+; CHECK: Post-MI-sched direction (postra-sched-bidirectional): bidirectional
+define float @postra-sched-bidirectional(float %input) nounwind #2 {
+  %x = fadd float %input, 1.000000e+00
+  ret float %x
+}
+
+; CHECK: Post-MI-sched direction (postra-sched-warning): topdown
+; WARNING: invalid value for postRa direction attribute
+define float @postra-sched-warning(float %input) nounwind #3 {
+  %x = fsub float %input, 1.000000e+00
+  ret float %x
+}
+
+attributes #0 = {"amdgpu-post-ra-direction"="topdown"}
+attributes #1 = {"amdgpu-post-ra-direction"="bottomup"}
+attributes #2 = {"amdgpu-post-ra-direction"="bidirectional"}
+attributes #3 = {"amdgpu-post-ra-direction"="warning"}