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Nicholas-BaronNicholas-Baron
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Update ASM tests
1 parent 0ca6812 commit 500b198

8 files changed

+270
-252
lines changed

‎llvm/test/CodeGen/AMDGPU/addrspacecast.ll‎

Lines changed: 238 additions & 230 deletions
Large diffs are not rendered by default.

‎llvm/test/CodeGen/AMDGPU/amdgpu-no-agprs-violations.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@ define void @func_illegal_agpr_use_asm() #0 {
3434
; GFX908: v_accvgpr_write_b32
3535
; GFX90A-NOT: v_accvgpr_write_b32
3636

37-
; GFX908: NumVgprs: 5
37+
; GFX908: NumVgprs: 30
3838
; GFX908: NumAgprs: 32
3939
; GFX90A: NumVgprs: 35
4040
; GFX90A: NumAgprs: 0

‎llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -mattr=-trap-handler < %s | FileCheck %s --check-prefixes=GCN,TRAP-HANDLER-DISABLE
33

44
; GCN-LABEL: {{^}}amdhsa_trap_num_sgprs
5-
; TRAP-HANDLER-ENABLE: NumSgprs: 61
6-
; TRAP-HANDLER-DISABLE: NumSgprs: 77
5+
; TRAP-HANDLER-ENABLE: NumSgprs: 63
6+
; TRAP-HANDLER-DISABLE: NumSgprs: 78
77
define amdgpu_kernel void @amdhsa_trap_num_sgprs(
88
ptr addrspace(1) %out0, i32 %in0,
99
ptr addrspace(1) %out1, i32 %in1,

‎llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll‎

Lines changed: 13 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -379,8 +379,15 @@ define void @too_many_args_use_workitem_id_x(
379379
; GCN-LABEL: {{^}}kern_call_too_many_args_use_workitem_id_x:
380380

381381
; GCN: s_mov_b32 s32, 0
382-
; GCN: buffer_store_dword v1, off, s[0:3], s32{{$}}
383-
; GCN: v_mov_b32_e32 v31, v0
382+
383+
; GFX90A: v_mov_b32_e32 v1, 0x140
384+
; GFX90A: buffer_store_dword v1, off, s[0:3], s32{{$}}
385+
; GFX90A: v_mov_b32_e32 v31, v0
386+
387+
; GFX7: v_mov_b32_e32 v31, v0
388+
; GFX7: v_mov_b32_e32 v0, 0x140
389+
; GFX7: buffer_store_dword v0, off, s[0:3], s32{{$}}
390+
384391
; GCN: s_swappc_b64
385392

386393
; GCN: .amdhsa_system_vgpr_workitem_id 0
@@ -572,12 +579,12 @@ define void @func_call_too_many_args_use_workitem_id_x_byval() #1 {
572579
; GFX90A: global_store_dword v{{\[[0-9]+:[0-9]+]}}, [[ID_Y]], off{{$}}
573580
; GFX90A: global_store_dword v{{\[[0-9]+:[0-9]+]}}, [[ID_Z]], off{{$}}
574581

575-
; GFX7: v_and_b32_e32 v32, 0x3ff, v31
576-
; GFX7: v_bfe_u32 v32, v31, 10, 10
582+
; GFX7: buffer_load_dword [[LOAD_ARG31:v[0-9]+]], off, s[0:3], s32{{$}}
583+
; GFX7: v_and_b32_e32 v33, 0x3ff, v31
584+
; GFX7: v_bfe_u32 v33, v31, 10, 10
577585
; GCN7: v_bfe_u32 v31, v31, 20, 10
578-
; GFX7: flat_store_dword v{{\[[0-9]+:[0-9]+]}}, v32{{$}}
586+
; GFX7: flat_store_dword v{{\[[0-9]+:[0-9]+]}}, v33{{$}}
579587
; GFX7: flat_store_dword v{{\[[0-9]+:[0-9]+]}}, v31{{$}}
580-
; GFX7: buffer_load_dword [[LOAD_ARG31:v[0-9]+]], off, s[0:3], s32{{$}}
581588

582589
; GFX7: flat_store_dword v{{\[[0-9]+:[0-9]+]}}, [[LOAD_ARG31]]
583590
; GFX90A: global_store_dword v{{\[[0-9]+:[0-9]+]}}, [[LOAD_ARG31]]

‎llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -332,8 +332,8 @@ define amdgpu_kernel void @kern_indirect_other_arg_use_workitem_id_z() #1 {
332332
}
333333

334334
; GCN-LABEL: {{^}}too_many_args_use_workitem_id_x:
335-
; FIXEDABI: v_and_b32_e32 v31, 0x3ff, v31
336335
; FIXEDABI: buffer_load_dword v{{[0-9]+}}, off, s[0:3], s32{{$}}
336+
; FIXEDABI: v_and_b32_e32 v31, 0x3ff, v31
337337
define void @too_many_args_use_workitem_id_x(
338338
i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4, i32 %arg5, i32 %arg6, i32 %arg7,
339339
i32 %arg8, i32 %arg9, i32 %arg10, i32 %arg11, i32 %arg12, i32 %arg13, i32 %arg14, i32 %arg15,
@@ -464,10 +464,11 @@ define void @too_many_args_call_too_many_args_use_workitem_id_x(
464464

465465
; GCN-LABEL: {{^}}too_many_args_use_workitem_id_x_byval:
466466

467+
; FIXEDABI: buffer_load_dword v32, off, s[0:3], s32{{$}}
468+
467469
; FIXEDABI: v_and_b32_e32 v31, 0x3ff, v31
468470
; FIXEDABI-NEXT: {{flat|global}}_store_dword v{{\[[0-9]+:[0-9]+\]}}, v31
469471

470-
; FIXEDABI: buffer_load_dword v31, off, s[0:3], s32{{$}}
471472
; FIXEDABI: {{flat|global}}_store_dword v{{\[[0-9]+:[0-9]+\]}}, v0
472473
; FIXEDABI: buffer_load_dword v0, off, s[0:3], s32 offset:4 glc{{$}}
473474
; FIXEDABI: s_setpc_b64

‎llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ entry:
4444
; CHECK-LABEL: {{^}}global_extload_v16f16_to_v16f64:
4545
; TONGA: NumSgprs: 96
4646
; TONGA-GCNTRACKERS: NumSgprs: 96
47-
; TONGA: NumVgprs: 21
47+
; TONGA: NumVgprs: 26
4848
; TONGA-GCNTRACKERS: NumVgprs: 23
4949
; TONGA: Occupancy: 8
5050
; TONGA-GCNTRACKERS: Occupancy: 8
@@ -59,9 +59,9 @@ define amdgpu_kernel void @global_extload_v16f16_to_v16f64(ptr addrspace(1) %out
5959

6060
; CHECK-LABEL: {{^}}constant_zextload_v64i16_to_v64i32:
6161
; GENERIC: NumSgprs: 71
62-
; GENERIC-GCNTRACKERS: NumSgprs: 45
63-
; GENERIC: NumVgprs: 20
64-
; GENERIC-GCNTRACKERS: NumVgprs: 20
62+
; GENERIC-GCNTRACKERS: NumSgprs: 35
63+
; GENERIC: NumVgprs: 24
64+
; GENERIC-GCNTRACKERS: NumVgprs: 34
6565
; GENERIC: Occupancy: 7
6666
; GENERIC-GCNTRACKERS: Occupancy: 10
6767

‎llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -7,16 +7,16 @@
77
; Using -amgpu-schedule-relaxed-occupancy allows scheduler to produce better ILP by further relaxing occupancy target
88

99
; CHECK-LABEL: {{^}}load_fma_store:
10-
; OCC: NumVgprs: 24
11-
; OCC-GCNTRACKER: NumVgprs: 26
10+
; OCC: NumVgprs: 28
11+
; OCC-GCNTRACKER: NumVgprs: 20
1212
; RELAX: NumVgprs: 64
1313
; RELAX-GCNTRACKER: NumVgprs: 60
14-
; OCC: NumVGPRsForWavesPerEU: 24
15-
; OCC-GCNTRACKER: NumVGPRsForWavesPerEU: 26
14+
; OCC: NumVGPRsForWavesPerEU: 28
15+
; OCC-GCNTRACKER: NumVGPRsForWavesPerEU: 20
1616
; RELAX: NumVGPRsForWavesPerEU: 64
1717
; RELAX-GCNTRACKER: NumVGPRsForWavesPerEU: 60
18-
; OCC: Occupancy: 10
19-
; OCC-GCNTRACKER: Occupancy: 9
18+
; OCC: Occupancy: 9
19+
; OCC-GCNTRACKER: Occupancy: 10
2020
; RELAX: Occupancy: 4
2121
; RELAX-GCNTRACKER: Occupancy: 4
2222

‎llvm/test/CodeGen/AMDGPU/soft-clause-exceeds-register-budget.ll‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,13 +3,15 @@
33
define protected amdgpu_kernel void @excess_soft_clause_reg_pressure(ptr addrspace(4) %wei_ptr, ptr addrspace(1) %out_ptr, ptr addrspace(1) %in) {
44
; CHECK-LABEL: excess_soft_clause_reg_pressure:
55
; CHECK: BB0_1: ; %for.cond28.preheader
6+
7+
; CHECK: global_load_dword
8+
69
; CHECK: s_load_dwordx16
710
; CHECK-NEXT: s_load_dwordx16
811

912
; CHECK: global_load_dword
1013
; CHECK-NEXT: global_load_dword
1114
; CHECK-NEXT: global_load_dword
12-
; CHECK-NEXT: global_load_dword
1315

1416
; CHECK: s_load_dwordx16
1517
; CHECK-NEXT: s_load_dwordx16

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