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fixup! wording
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llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1048,7 +1048,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) {
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if (Subtarget->enablePExtCodeGen() && isApplicableToPLI(Imm) &&
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hasAllWUsers(Node)) {
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// If its 4 packed 8-bit integers or 2 packed signed 16-bit integers, we
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// If it's 4 packed 8-bit integers or 2 packed signed 16-bit integers, we
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// can simply copy lower 32 bits to higher 32 bits to make it able to
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// rematerialize to PLI_B or PLI_H
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Imm = ((uint64_t)Imm << 32) | (Imm & 0xFFFFFFFF);

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