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fixup! remove declare
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llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll

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@@ -555,4 +555,3 @@ declare <4 x i8> @llvm.smin.v4i8(<4 x i8>, <4 x i8>)
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declare <4 x i8> @llvm.smax.v4i8(<4 x i8>, <4 x i8>)
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declare <4 x i8> @llvm.umin.v4i8(<4 x i8>, <4 x i8>)
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declare <4 x i8> @llvm.umax.v4i8(<4 x i8>, <4 x i8>)
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declare <2 x i16> @llvm.sshl.sat.v2i16(<2 x i16> %a, <2 x i16> %b)

llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll

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@@ -568,4 +568,3 @@ declare <8 x i8> @llvm.smin.v8i8(<8 x i8>, <8 x i8>)
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declare <8 x i8> @llvm.smax.v8i8(<8 x i8>, <8 x i8>)
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declare <8 x i8> @llvm.umin.v8i8(<8 x i8>, <8 x i8>)
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declare <8 x i8> @llvm.umax.v8i8(<8 x i8>, <8 x i8>)
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declare <2 x i32> @llvm.sshl.sat.v2i32(<2 x i32> %a, <2 x i32> %b)

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