remove debugging code

Author: arjunUpatel

llvm/include/llvm/MC/MCInstrAnalysis.h

@@ -184,9 +184,9 @@ class MCInstrAnalysis {
 
   /// Given an instruction that accesses a menory address, try to compute
   /// the target address. Return true success, and the address in Target.
-  virtual bool
-  evaluateInstruction(const MCInst &Inst, uint64_t Addr, uint64_t Size,
-                      uint64_t &Target, raw_ostream *TargetOS) const;
+  virtual bool evaluateInstruction(const MCInst &Inst, uint64_t Addr,
+                                   uint64_t Size, uint64_t &Target,
+                                   raw_ostream *TargetOS) const;
 
   /// Given an instruction tries to get the address of a memory operand. Returns
   /// the address on success.

llvm/lib/MC/MCInstrAnalysis.cpp

@@ -30,9 +30,9 @@ bool MCInstrAnalysis::evaluateBranch(const MCInst & /*Inst*/, uint64_t /*Addr*/,
   return false;
 }
 
-bool MCInstrAnalysis::evaluateInstruction(const MCInst &Inst,
-                                          uint64_t Addr, uint64_t Size,
-                                          uint64_t &Target, raw_ostream *TargetOS) const {
+bool MCInstrAnalysis::evaluateInstruction(const MCInst &Inst, uint64_t Addr,
+                                          uint64_t Size, uint64_t &Target,
+                                          raw_ostream *TargetOS) const {
   return false;
 }
 

llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp

@@ -241,7 +241,8 @@ class RISCVMCInstrAnalysis : public MCInstrAnalysis {
   }
 
   bool evaluateInstruction(const MCInst &Inst, uint64_t Addr, uint64_t Size,
-                           uint64_t &Target, raw_ostream *TargetOS) const override {
+                           uint64_t &Target,
+                           raw_ostream *TargetOS) const override {
     switch(Inst.getOpcode()) {
     default:
       return false;
@@ -428,6 +429,8 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTargetMC() {
     TargetRegistry::RegisterNullTargetStreamer(*T,
                                                createRISCVNullTargetStreamer);
   }
-    TargetRegistry::RegisterMCInstrAnalysis(getTheRISCV32Target(), createRISCV32InstrAnalysis);
-    TargetRegistry::RegisterMCInstrAnalysis(getTheRISCV64Target(), createRISCV64InstrAnalysis);
+  TargetRegistry::RegisterMCInstrAnalysis(getTheRISCV32Target(),
+                                          createRISCV32InstrAnalysis);
+  TargetRegistry::RegisterMCInstrAnalysis(getTheRISCV64Target(),
+                                          createRISCV64InstrAnalysis);
 }

llvm/tools/llvm-objdump/llvm-objdump.cpp

@@ -2323,8 +2323,11 @@ disassembleObject(ObjectFile &Obj, const ObjectFile &DbgObj,
           if (Disassembled && DT->InstrAnalysis) {
             llvm::raw_ostream *TargetOS = &FOS;
             uint64_t Target;
-            bool PrintTarget = DT->InstrAnalysis->evaluateBranch(Inst, SectionAddr + Index, Size, Target) || 
-                               DT->InstrAnalysis->evaluateInstruction(Inst, SectionAddr + Index, Size, Target, TargetOS);
+            bool PrintTarget =
+                DT->InstrAnalysis->evaluateBranch(Inst, SectionAddr + Index,
+                                                  Size, Target) ||
+                DT->InstrAnalysis->evaluateInstruction(
+                    Inst, SectionAddr + Index, Size, Target, TargetOS);
             if (!PrintTarget) {
               if (std::optional<uint64_t> MaybeTarget =
                       DT->InstrAnalysis->evaluateMemoryOperandAddress(