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1 parent 1da11ad commit 60892edCopy full SHA for 60892ed
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -11307,15 +11307,15 @@ SDValue PPCTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
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SDValue CR6Reg = DAG.getRegister(PPC::CR6, MVT::i32);
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SDValue CRBit =
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SDValue(DAG.getMachineNode(TargetOpcode::EXTRACT_SUBREG, dl, MVT::i1,
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- CR6Reg, SubRegIdx, GlueOp), 0);
+ CR6Reg, SubRegIdx, GlueOp),
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+ 0);
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return DAG.getNode(SetOp, dl, MVT::i32, CRBit);
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}
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// Now that we have the comparison, emit a copy from the CR to a GPR.
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// This is flagged to the above dot comparison.
- SDValue Flags =
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- DAG.getNode(PPCISD::MFOCRF, dl, MVT::i32,
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- DAG.getRegister(PPC::CR6, MVT::i32), GlueOp);
+ SDValue Flags = DAG.getNode(PPCISD::MFOCRF, dl, MVT::i32,
+ DAG.getRegister(PPC::CR6, MVT::i32), GlueOp);
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// Shift the bit into the low position.
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Flags = DAG.getNode(ISD::SRL, dl, MVT::i32, Flags,
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