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1 parent 23f2074 commit 64e1ee2Copy full SHA for 64e1ee2
llvm/test/CodeGen/RISCV/rvv/pr141907.ll
@@ -1,5 +1,5 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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-; RUN: llc -mtriple=riscv64 -mcpu=sifive-p670 | FileCheck %s
+; RUN: llc < %s -mtriple=riscv64 -mcpu=sifive-p670 | FileCheck %s
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define void @pr141907(ptr %0) nounwind {
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; CHECK-LABEL: pr141907:
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