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Replace min/max with fminnum fminimumnum fmaxnum fmaximumnum
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4 files changed

+105
-34
lines changed

4 files changed

+105
-34
lines changed

‎llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -183,6 +183,11 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
183183
for (auto T : {MVT::i32, MVT::i64})
184184
setOperationAction(Op, T, Custom);
185185

186+
if (Subtarget->hasRelaxedSIMD()) {
187+
setOperationAction(
188+
{ISD::FMINNUM, ISD::FMINIMUMNUM, ISD::FMAXNUM, ISD::FMAXIMUMNUM},
189+
{MVT::v4f32, MVT::v2f64}, Legal);
190+
}
186191
// SIMD-specific configuration
187192
if (Subtarget->hasSIMD128()) {
188193

‎llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td‎

Lines changed: 28 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1695,21 +1695,37 @@ defm SIMD_RELAXED_FMAX :
16951695
// Transform standard fminimum/fmaximum to relaxed versions
16961696
// AddedComplexity ensures these patterns match before the standard MIN/MAX
16971697
let AddedComplexity = 1 in {
1698-
def : Pat<(v4f32 (fminimum (v4f32 V128:$lhs), (v4f32 V128:$rhs))),
1699-
(SIMD_RELAXED_FMIN_F32x4 V128:$lhs, V128:$rhs)>,
1700-
Requires<[HasRelaxedSIMD]>;
1698+
def : Pat<(v4f32 (fminnum (v4f32 V128:$lhs), (v4f32 V128:$rhs))),
1699+
(SIMD_RELAXED_FMIN_F32x4 V128:$lhs, V128:$rhs)>,
1700+
Requires<[HasRelaxedSIMD]>;
17011701

1702-
def : Pat<(v4f32 (fmaximum (v4f32 V128:$lhs), (v4f32 V128:$rhs))),
1703-
(SIMD_RELAXED_FMAX_F32x4 V128:$lhs, V128:$rhs)>,
1704-
Requires<[HasRelaxedSIMD]>;
1702+
def : Pat<(v4f32 (fminimumnum (v4f32 V128:$lhs), (v4f32 V128:$rhs))),
1703+
(SIMD_RELAXED_FMIN_F32x4 V128:$lhs, V128:$rhs)>,
1704+
Requires<[HasRelaxedSIMD]>;
17051705

1706-
def : Pat<(v2f64 (fminimum (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
1707-
(SIMD_RELAXED_FMIN_F64x2 V128:$lhs, V128:$rhs)>,
1708-
Requires<[HasRelaxedSIMD]>;
1706+
def : Pat<(v4f32 (fmaxnum (v4f32 V128:$lhs), (v4f32 V128:$rhs))),
1707+
(SIMD_RELAXED_FMAX_F32x4 V128:$lhs, V128:$rhs)>,
1708+
Requires<[HasRelaxedSIMD]>;
17091709

1710-
def : Pat<(v2f64 (fmaximum (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
1711-
(SIMD_RELAXED_FMAX_F64x2 V128:$lhs, V128:$rhs)>,
1712-
Requires<[HasRelaxedSIMD]>;
1710+
def : Pat<(v4f32 (fmaximumnum (v4f32 V128:$lhs), (v4f32 V128:$rhs))),
1711+
(SIMD_RELAXED_FMAX_F32x4 V128:$lhs, V128:$rhs)>,
1712+
Requires<[HasRelaxedSIMD]>;
1713+
1714+
def : Pat<(v2f64 (fminnum (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
1715+
(SIMD_RELAXED_FMIN_F64x2 V128:$lhs, V128:$rhs)>,
1716+
Requires<[HasRelaxedSIMD]>;
1717+
1718+
def : Pat<(v2f64 (fminimumnum (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
1719+
(SIMD_RELAXED_FMIN_F64x2 V128:$lhs, V128:$rhs)>,
1720+
Requires<[HasRelaxedSIMD]>;
1721+
1722+
def : Pat<(v2f64 (fmaxnum (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
1723+
(SIMD_RELAXED_FMAX_F64x2 V128:$lhs, V128:$rhs)>,
1724+
Requires<[HasRelaxedSIMD]>;
1725+
1726+
def : Pat<(v2f64 (fmaximumnum (v2f64 V128:$lhs), (v2f64 V128:$rhs))),
1727+
(SIMD_RELAXED_FMAX_F64x2 V128:$lhs, V128:$rhs)>,
1728+
Requires<[HasRelaxedSIMD]>;
17131729
}
17141730

17151731
//===----------------------------------------------------------------------===//

‎llvm/test/CodeGen/WebAssembly/simd-relaxed-fmax.ll‎

Lines changed: 36 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -2,34 +2,59 @@
22

33
; RUN: llc < %s -mtriple=wasm32-unknown-unknown -mattr=+simd128,+relaxed-simd | FileCheck %s
44

5-
; Test that fminimum and fmaximum get transformed to relaxed_min and relaxed_max
5+
; Test that fmaxnum and fmaximumnum get transformed to relaxed_max
66

77
target triple = "wasm32"
88

9-
define <4 x float> @test_max_f32x4(<4 x float> %a, <4 x float> %b) {
10-
; CHECK-LABEL: test_max_f32x4:
11-
; CHECK: .functype test_max_f32x4 (v128, v128) -> (v128)
9+
define <4 x float> @test_maxnum_f32x4(<4 x float> %a, <4 x float> %b) {
10+
; CHECK-LABEL: test_maxnum_f32x4:
11+
; CHECK: .functype test_maxnum_f32x4 (v128, v128) -> (v128)
1212
; CHECK-NEXT: # %bb.0:
1313
; CHECK-NEXT: local.get 0
1414
; CHECK-NEXT: local.get 1
1515
; CHECK-NEXT: f32x4.relaxed_max
1616
; CHECK-NEXT: # fallthrough-return
17-
%result = call <4 x float> @llvm.maximum.v4f32(<4 x float> %a, <4 x float> %b)
17+
%result = call <4 x float> @llvm.maxnum.v4f32(<4 x float> %a, <4 x float> %b)
1818
ret <4 x float> %result
1919
}
2020

21+
define <4 x float> @test_maximumnum_f32x4(<4 x float> %a, <4 x float> %b) {
22+
; CHECK-LABEL: test_maximumnum_f32x4:
23+
; CHECK: .functype test_maximumnum_f32x4 (v128, v128) -> (v128)
24+
; CHECK-NEXT: # %bb.0:
25+
; CHECK-NEXT: local.get 0
26+
; CHECK-NEXT: local.get 1
27+
; CHECK-NEXT: f32x4.relaxed_max
28+
; CHECK-NEXT: # fallthrough-return
29+
%result = call <4 x float> @llvm.maximumnum.v4f32(<4 x float> %a, <4 x float> %b)
30+
ret <4 x float> %result
31+
}
32+
33+
define <2 x double> @test_maxnum_f64x2(<2 x double> %a, <2 x double> %b) {
34+
; CHECK-LABEL: test_maxnum_f64x2:
35+
; CHECK: .functype test_maxnum_f64x2 (v128, v128) -> (v128)
36+
; CHECK-NEXT: # %bb.0:
37+
; CHECK-NEXT: local.get 0
38+
; CHECK-NEXT: local.get 1
39+
; CHECK-NEXT: f64x2.relaxed_max
40+
; CHECK-NEXT: # fallthrough-return
41+
%result = call <2 x double> @llvm.maxnum.v2f64(<2 x double> %a, <2 x double> %b)
42+
ret <2 x double> %result
43+
}
2144

22-
define <2 x double> @test_max_f64x2(<2 x double> %a, <2 x double> %b) {
23-
; CHECK-LABEL: test_max_f64x2:
24-
; CHECK: .functype test_max_f64x2 (v128, v128) -> (v128)
45+
define <2 x double> @test_minimumnum_f64x2(<2 x double> %a, <2 x double> %b) {
46+
; CHECK-LABEL: test_minimumnum_f64x2:
47+
; CHECK: .functype test_minimumnum_f64x2 (v128, v128) -> (v128)
2548
; CHECK-NEXT: # %bb.0:
2649
; CHECK-NEXT: local.get 0
2750
; CHECK-NEXT: local.get 1
2851
; CHECK-NEXT: f64x2.relaxed_max
2952
; CHECK-NEXT: # fallthrough-return
30-
%result = call <2 x double> @llvm.maximum.v2f64(<2 x double> %a, <2 x double> %b)
53+
%result = call <2 x double> @llvm.maximumnum.v2f64(<2 x double> %a, <2 x double> %b)
3154
ret <2 x double> %result
3255
}
3356

34-
declare <4 x float> @llvm.maximum.v4f32(<4 x float>, <4 x float>)
35-
declare <2 x double> @llvm.maximum.v2f64(<2 x double>, <2 x double>)
57+
declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>)
58+
declare <4 x float> @llvm.maximumnum.v4f32(<4 x float>, <4 x float>)
59+
declare <2 x double> @llvm.maxnum.v2f64(<2 x double>, <2 x double>)
60+
declare <2 x double> @llvm.maximumnum.v2f64(<2 x double>, <2 x double>)

‎llvm/test/CodeGen/WebAssembly/simd-relaxed-fmin.ll‎

Lines changed: 36 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,34 +1,59 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
22
; RUN: llc < %s -mtriple=wasm32-unknown-unknown -mattr=+simd128,+relaxed-simd | FileCheck %s
33

4-
; Test that fminimum and fmaximum get transformed to relaxed_min and relaxed_max
4+
; Test that fminnum and fminimumnum get transformed to relaxed_min
55

66
target triple = "wasm32"
77

8-
define <4 x float> @test_min_f32x4(<4 x float> %a, <4 x float> %b) {
9-
; CHECK-LABEL: test_min_f32x4:
10-
; CHECK: .functype test_min_f32x4 (v128, v128) -> (v128)
8+
define <4 x float> @test_minnum_f32x4(<4 x float> %a, <4 x float> %b) {
9+
; CHECK-LABEL: test_minnum_f32x4:
10+
; CHECK: .functype test_minnum_f32x4 (v128, v128) -> (v128)
1111
; CHECK-NEXT: # %bb.0:
1212
; CHECK-NEXT: local.get 0
1313
; CHECK-NEXT: local.get 1
1414
; CHECK-NEXT: f32x4.relaxed_min
1515
; CHECK-NEXT: # fallthrough-return
16-
%result = call <4 x float> @llvm.minimum.v4f32(<4 x float> %a, <4 x float> %b)
16+
%result = call <4 x float> @llvm.minnum.v4f32(<4 x float> %a, <4 x float> %b)
1717
ret <4 x float> %result
1818
}
1919

20+
define <4 x float> @test_minimumnum_f32x4(<4 x float> %a, <4 x float> %b) {
21+
; CHECK-LABEL: test_minimumnum_f32x4:
22+
; CHECK: .functype test_minimumnum_f32x4 (v128, v128) -> (v128)
23+
; CHECK-NEXT: # %bb.0:
24+
; CHECK-NEXT: local.get 0
25+
; CHECK-NEXT: local.get 1
26+
; CHECK-NEXT: f32x4.relaxed_min
27+
; CHECK-NEXT: # fallthrough-return
28+
%result = call <4 x float> @llvm.minimumnum.v4f32(<4 x float> %a, <4 x float> %b)
29+
ret <4 x float> %result
30+
}
31+
32+
define <2 x double> @test_minnum_f64x2(<2 x double> %a, <2 x double> %b) {
33+
; CHECK-LABEL: test_minnum_f64x2:
34+
; CHECK: .functype test_minnum_f64x2 (v128, v128) -> (v128)
35+
; CHECK-NEXT: # %bb.0:
36+
; CHECK-NEXT: local.get 0
37+
; CHECK-NEXT: local.get 1
38+
; CHECK-NEXT: f64x2.relaxed_min
39+
; CHECK-NEXT: # fallthrough-return
40+
%result = call <2 x double> @llvm.minnum.v2f64(<2 x double> %a, <2 x double> %b)
41+
ret <2 x double> %result
42+
}
2043

21-
define <2 x double> @test_min_f64x2(<2 x double> %a, <2 x double> %b) {
22-
; CHECK-LABEL: test_min_f64x2:
23-
; CHECK: .functype test_min_f64x2 (v128, v128) -> (v128)
44+
define <2 x double> @test_minimumnum_f64x2(<2 x double> %a, <2 x double> %b) {
45+
; CHECK-LABEL: test_minimumnum_f64x2:
46+
; CHECK: .functype test_minimumnum_f64x2 (v128, v128) -> (v128)
2447
; CHECK-NEXT: # %bb.0:
2548
; CHECK-NEXT: local.get 0
2649
; CHECK-NEXT: local.get 1
2750
; CHECK-NEXT: f64x2.relaxed_min
2851
; CHECK-NEXT: # fallthrough-return
29-
%result = call <2 x double> @llvm.minimum.v2f64(<2 x double> %a, <2 x double> %b)
52+
%result = call <2 x double> @llvm.minimumnum.v2f64(<2 x double> %a, <2 x double> %b)
3053
ret <2 x double> %result
3154
}
3255

33-
declare <4 x float> @llvm.minimum.v4f32(<4 x float>, <4 x float>)
34-
declare <2 x double> @llvm.minimum.v2f64(<2 x double>, <2 x double>)
56+
declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>)
57+
declare <4 x float> @llvm.fminimumnum.v4f32(<4 x float>, <4 x float>)
58+
declare <2 x double> @llvm.minnum.v2f64(<2 x double>, <2 x double>)
59+
declare <2 x double> @llvm.fminimumnum.v2f64(<2 x double>, <2 x double>)

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