@@ -2258,6 +2258,7 @@ bool SPIRVInstructionSelector::selectDot4AddPackedExpansion(
22582258 .constrainAllUses (TII, TRI, RBI);
22592259
22602260 // B[i]
2261+ Register BElt = MRI->createVirtualRegister (&SPIRV::IDRegClass);
22612262 Result &= BuildMI (BB, I, I.getDebugLoc (), TII.get (ExtractOp))
22622263 .addDef (BElt)
22632264 .addUse (GR.getSPIRVTypeID (ResType))
@@ -2281,14 +2282,15 @@ bool SPIRVInstructionSelector::selectDot4AddPackedExpansion(
22812282
22822283 // Discard 24 highest-bits so that stored i32 register is i8 equivalent
22832284 Register MaskMul = MRI->createVirtualRegister (&SPIRV::IDRegClass);
2284- Result &=
2285- BuildMI (BB, I, I.getDebugLoc (), TII.get (ExtractOp))
2286- .addDef (MaskMul)
2287- .addUse (GR.getSPIRVTypeID (ResType))
2288- .addUse (Mul)
2289- .addUse (GR.getOrCreateConstInt (APInt (8 , 0 ), I, EltType, TII, ZeroAsNull))
2290- .addUse (GR.getOrCreateConstInt (APInt (8 , 8 ), I, EltType, TII, ZeroAsNull))
2291- .constrainAllUses (TII, TRI, RBI);
2285+ Result &= BuildMI (BB, I, I.getDebugLoc (), TII.get (ExtractOp))
2286+ .addDef (MaskMul)
2287+ .addUse (GR.getSPIRVTypeID (ResType))
2288+ .addUse (Mul)
2289+ .addUse (GR.getOrCreateConstInt (APInt (8 , 0 ), I, EltType, TII,
2290+ ZeroAsNull))
2291+ .addUse (GR.getOrCreateConstInt (APInt (8 , 8 ), I, EltType, TII,
2292+ ZeroAsNull))
2293+ .constrainAllUses (TII, TRI, RBI);
22922294
22932295 // Acc = Acc + A[i] * B[i]
22942296 Register Sum =
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