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Remove debug
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llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp

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@@ -708,7 +708,6 @@ uint64_t RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
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// If linker relaxation is enabled and supported by this relocation, set a bit
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// so that the assembler knows the size of the instruction is not fixed/known,
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// and the relocation will need a R_RISCV_RELAX relocation.
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LLVM_DEBUG(dbgs() << "Maybe Marking Fixup " << Fixups.back().getKind() << " as Relaxable " << EnableRelax << " " << RelaxCandidate << "\n");
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if (EnableRelax && RelaxCandidate)
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Fixups.back().setLinkerRelaxable();
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++MCNumFixups;

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