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Commit 688142d

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Fix code formatting
1 parent 01fa59a commit 688142d

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2 files changed

+11
-7
lines changed

2 files changed

+11
-7
lines changed

llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -9181,14 +9181,15 @@ static bool isRegOrImmWithInputMods(const MCInstrDesc &Desc, unsigned OpNum) {
91819181
void AMDGPUAsmParser::cvtOpSelHelper(MCInst &Inst, unsigned OpSel) {
91829182
unsigned Opc = Inst.getOpcode();
91839183
constexpr AMDGPU::OpName Ops[] = {AMDGPU::OpName::src0, AMDGPU::OpName::src1,
9184-
AMDGPU::OpName::src2};
9184+
AMDGPU::OpName::src2};
91859185
constexpr AMDGPU::OpName ModOps[] = {AMDGPU::OpName::src0_modifiers,
9186-
AMDGPU::OpName::src1_modifiers,
9187-
AMDGPU::OpName::src2_modifiers};
9186+
AMDGPU::OpName::src1_modifiers,
9187+
AMDGPU::OpName::src2_modifiers};
91889188
for (int J = 0; J < 3; ++J) {
91899189
int OpIdx = AMDGPU::getNamedOperandIdx(Opc, Ops[J]);
91909190
if (OpIdx == -1)
9191-
// Some instructions, e.g. v_interp_p2_f16 in GFX9, have src0, src2, but no src1. So continue instead of break.
9191+
// Some instructions, e.g. v_interp_p2_f16 in GFX9, have src0, src2, but
9192+
// no src1. So continue instead of break.
91929193
continue;
91939194

91949195
int ModIdx = AMDGPU::getNamedOperandIdx(Opc, ModOps[J]);

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1280,10 +1280,13 @@ void AMDGPUInstPrinter::printPackedModifier(const MCInst *MI,
12801280
(ModIdx != -1) ? MI->getOperand(ModIdx).getImm() : DefaultValue;
12811281
}
12821282

1283-
// Some instructions, e.g. v_interp_p2_f16 in GFX9, have src0, src2, but no src1.
1284-
if (NumOps == 1 && AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::src2) && !AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::src1)) {
1283+
// Some instructions, e.g. v_interp_p2_f16 in GFX9, have src0, src2, but no
1284+
// src1.
1285+
if (NumOps == 1 && AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::src2) &&
1286+
!AMDGPU::hasNamedOperand(Opc, AMDGPU::OpName::src1)) {
12851287
Ops[NumOps++] = DefaultValue; // Set src1_modifiers to default.
1286-
int Mod2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2_modifiers);
1288+
int Mod2Idx =
1289+
AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2_modifiers);
12871290
assert(Mod2Idx != -1);
12881291
Ops[NumOps++] = MI->getOperand(Mod2Idx).getImm();
12891292
}

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