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AMDGPU: Add tests for atomics with AGPR operands (#155820)
The handling of AGPR vs. VGPR operand restrictions is broken and results in bugs like #155777 and missed optimizations. Add some baseline tests for future improvements.
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‎llvm/test/CodeGen/AMDGPU/a-v-ds-atomic-cmpxchg.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=amdgcn -mcpu=gfx90a -verify-machineinstrs < %s | FileCheck %s
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define void @ds_atomic_cmpxchg_i32_ret_av_av__av(ptr addrspace(3) %ptr) #0 {
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; CHECK-LABEL: ds_atomic_cmpxchg_i32_ret_av_av__av:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; def v1
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; def v2
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: ds_cmpst_rtn_b32 v0, v0, v1, v2 offset:40
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; CHECK-NEXT: s_waitcnt lgkmcnt(0)
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; use v0
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %ptr, i32 0, i32 10
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%data0 = call i32 asm "; def $0", "=^VA"()
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%data1 = call i32 asm "; def $0", "=^VA"()
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%pair = cmpxchg ptr addrspace(3) %gep.0, i32 %data0, i32 %data1 seq_cst monotonic
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%result = extractvalue { i32, i1 } %pair, 0
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call void asm "; use $0", "^VA"(i32 %result)
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ret void
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}
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define void @ds_atomic_cmpxchg_i32_ret_av_av__v(ptr addrspace(3) %ptr) #0 {
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; CHECK-LABEL: ds_atomic_cmpxchg_i32_ret_av_av__v:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; def v1
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; def v2
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: ds_cmpst_rtn_b32 v0, v0, v1, v2 offset:40
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; CHECK-NEXT: s_waitcnt lgkmcnt(0)
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; use v0
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %ptr, i32 0, i32 10
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%data0 = call i32 asm "; def $0", "=^VA"()
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%data1 = call i32 asm "; def $0", "=^VA"()
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%pair = cmpxchg ptr addrspace(3) %gep.0, i32 %data0, i32 %data1 seq_cst monotonic
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%result = extractvalue { i32, i1 } %pair, 0
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call void asm "; use $0", "v"(i32 %result)
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ret void
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}
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define void @ds_atomic_cmpxchg_i32_ret_av_av__a(ptr addrspace(3) %ptr) #0 {
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; CHECK-LABEL: ds_atomic_cmpxchg_i32_ret_av_av__a:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; def v1
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; def v2
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: ds_cmpst_rtn_b32 v0, v0, v1, v2 offset:40
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; CHECK-NEXT: s_waitcnt lgkmcnt(0)
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; CHECK-NEXT: v_accvgpr_write_b32 a0, v0
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; use a0
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %ptr, i32 0, i32 10
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%data0 = call i32 asm "; def $0", "=^VA"()
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%data1 = call i32 asm "; def $0", "=^VA"()
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%pair = cmpxchg ptr addrspace(3) %gep.0, i32 %data0, i32 %data1 seq_cst monotonic
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%result = extractvalue { i32, i1 } %pair, 0
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call void asm "; use $0", "a"(i32 %result)
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ret void
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}
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; FIXME: Broken
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; define void @ds_atomic_cmpxchg_i32_ret_a_a__a(ptr addrspace(3) %ptr) #0 {
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; %gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %ptr, i32 0, i32 10
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; %data0 = call i32 asm "; def $0", "=a"()
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; %data1 = call i32 asm "; def $0", "=a"()
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; %pair = cmpxchg ptr addrspace(3) %gep.0, i32 %data0, i32 %data1 seq_cst monotonic
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; %result = extractvalue { i32, i1 } %pair, 0
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; call void asm "; use $0", "a"(i32 %result)
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; ret void
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; }
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; FIXME: Broken
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; define void @ds_atomic_cmpxchg_i32_ret_a_a__v(ptr addrspace(3) %ptr) #0 {
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; %gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %ptr, i32 0, i32 10
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; %data0 = call i32 asm "; def $0", "=a"()
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; %data1 = call i32 asm "; def $0", "=a"()
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; %pair = cmpxchg ptr addrspace(3) %gep.0, i32 %data0, i32 %data1 seq_cst monotonic
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; %result = extractvalue { i32, i1 } %pair, 0
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; call void asm "; use $0", "v"(i32 %result)
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; ret void
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; }
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; FIXME: Broken
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; define void @ds_atomic_cmpxchg_i32_ret_v_a__v(ptr addrspace(3) %ptr) #0 {
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; %gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %ptr, i32 0, i32 10
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; %data0 = call i32 asm "; def $0", "=v"()
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; %data1 = call i32 asm "; def $0", "=a"()
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; %pair = cmpxchg ptr addrspace(3) %gep.0, i32 %data0, i32 %data1 seq_cst monotonic
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; %result = extractvalue { i32, i1 } %pair, 0
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; call void asm "; use $0", "v"(i32 %result)
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; ret void
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; }
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; FIXME: Broken
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; define void @ds_atomic_cmpxchg_i32_ret_a_v__v(ptr addrspace(3) %ptr) #0 {
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; %gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %ptr, i32 0, i32 10
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; %data0 = call i32 asm "; def $0", "=a"()
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; %data1 = call i32 asm "; def $0", "=v"()
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; %pair = cmpxchg ptr addrspace(3) %gep.0, i32 %data0, i32 %data1 seq_cst monotonic
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; %result = extractvalue { i32, i1 } %pair, 0
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; call void asm "; use $0", "v"(i32 %result)
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; ret void
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; }
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define void @ds_atomic_cmpxchg_i32_ret_v_v__a(ptr addrspace(3) %ptr) #0 {
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; CHECK-LABEL: ds_atomic_cmpxchg_i32_ret_v_v__a:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; def v1
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; def v2
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: ds_cmpst_rtn_b32 v0, v0, v1, v2 offset:40
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; CHECK-NEXT: s_waitcnt lgkmcnt(0)
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; CHECK-NEXT: v_accvgpr_write_b32 a0, v0
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; use a0
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %ptr, i32 0, i32 10
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%data0 = call i32 asm "; def $0", "=v"()
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%data1 = call i32 asm "; def $0", "=v"()
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%pair = cmpxchg ptr addrspace(3) %gep.0, i32 %data0, i32 %data1 seq_cst monotonic
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%result = extractvalue { i32, i1 } %pair, 0
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call void asm "; use $0", "a"(i32 %result)
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ret void
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}
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define void @ds_atomic_cmpxchg_i32_ret_av_v__av(ptr addrspace(3) %ptr) #0 {
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; CHECK-LABEL: ds_atomic_cmpxchg_i32_ret_av_v__av:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; def v1
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; def v2
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: ds_cmpst_rtn_b32 v0, v0, v1, v2 offset:40
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; CHECK-NEXT: s_waitcnt lgkmcnt(0)
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; use v0
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %ptr, i32 0, i32 10
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%data0 = call i32 asm "; def $0", "=^VA"()
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%data1 = call i32 asm "; def $0", "=v"()
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%pair = cmpxchg ptr addrspace(3) %gep.0, i32 %data0, i32 %data1 seq_cst monotonic
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%result = extractvalue { i32, i1 } %pair, 0
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call void asm "; use $0", "^VA"(i32 %result)
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ret void
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}
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define void @ds_atomic_cmpxchg_i32_ret_v_av__av(ptr addrspace(3) %ptr) #0 {
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; CHECK-LABEL: ds_atomic_cmpxchg_i32_ret_v_av__av:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; def v1
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; def v2
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: ds_cmpst_rtn_b32 v0, v0, v1, v2 offset:40
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; CHECK-NEXT: s_waitcnt lgkmcnt(0)
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; use v0
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %ptr, i32 0, i32 10
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%data0 = call i32 asm "; def $0", "=v"()
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%data1 = call i32 asm "; def $0", "=^VA"()
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%pair = cmpxchg ptr addrspace(3) %gep.0, i32 %data0, i32 %data1 seq_cst monotonic
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%result = extractvalue { i32, i1 } %pair, 0
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call void asm "; use $0", "^VA"(i32 %result)
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ret void
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}
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; FIXME: Broken
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; define void @ds_atomic_cmpxchg_i32_ret_av_a__av(ptr addrspace(3) %ptr) #0 {
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; %gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %ptr, i32 0, i32 10
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; %data0 = call i32 asm "; def $0", "=^VA"()
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; %data1 = call i32 asm "; def $0", "=a"()
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; %pair = cmpxchg ptr addrspace(3) %gep.0, i32 %data0, i32 %data1 seq_cst monotonic
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; %result = extractvalue { i32, i1 } %pair, 0
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; call void asm "; use $0", "^VA"(i32 %result)
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; ret void
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; }
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define void @ds_atomic_cmpxchg_i32_ret_a_av__av(ptr addrspace(3) %ptr) #0 {
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; CHECK-LABEL: ds_atomic_cmpxchg_i32_ret_a_av__av:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; def a0
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: v_accvgpr_read_b32 v2, a0
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; def v1
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: ds_cmpst_rtn_b32 v0, v0, v2, v1 offset:40
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; CHECK-NEXT: s_waitcnt lgkmcnt(0)
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; CHECK-NEXT: ;;#ASMSTART
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; CHECK-NEXT: ; use v0
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; CHECK-NEXT: ;;#ASMEND
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %ptr, i32 0, i32 10
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%data0 = call i32 asm "; def $0", "=a"()
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%data1 = call i32 asm "; def $0", "=^VA"()
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%pair = cmpxchg ptr addrspace(3) %gep.0, i32 %data0, i32 %data1 seq_cst monotonic
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%result = extractvalue { i32, i1 } %pair, 0
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call void asm "; use $0", "^VA"(i32 %result)
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ret void
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}
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attributes #0 = { nounwind "amdgpu-waves-per-eu"="10,10" }

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