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Add tests for global isel
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‎llvm/test/CodeGen/Thumb2/bf16-pcs.ll‎

Lines changed: 72 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,13 @@
44
; RUN: llc -mtriple=armv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16,+bf16 | FileCheck %s --check-prefix=LE-BF16
55
; RUN: llc -mtriple=armebv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16,+bf16 | FileCheck %s --check-prefix=BE-BF16
66

7+
;; Global ISel successfully generates code for some functions for little-endian
8+
;; without +bf16, and falls back to SelectionDAG in all others.
9+
; RUN: llc -mtriple=armv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16 -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefix=LE-GISEL
10+
; RUN: llc -mtriple=armebv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16 -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefix=BE
11+
; RUN: llc -mtriple=armv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16,+bf16 -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefix=LE-BF16
12+
; RUN: llc -mtriple=armebv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16,+bf16 -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefix=BE-BF16
13+
714
define arm_aapcscc bfloat @callee_soft_bfloat_in_reg(bfloat %f) {
815
; LE-LABEL: callee_soft_bfloat_in_reg:
916
; LE: @ %bb.0: @ %entry
@@ -30,6 +37,10 @@ define arm_aapcscc bfloat @callee_soft_bfloat_in_reg(bfloat %f) {
3037
; BE-BF16-NEXT: ldrh.w r0, [sp, #2]
3138
; BE-BF16-NEXT: add sp, #4
3239
; BE-BF16-NEXT: bx lr
40+
;
41+
; LE-GISEL-LABEL: callee_soft_bfloat_in_reg:
42+
; LE-GISEL: @ %bb.0: @ %entry
43+
; LE-GISEL-NEXT: bx lr
3344
entry:
3445
ret bfloat %f
3546
}
@@ -66,6 +77,14 @@ define void @caller_soft_bfloat_in_reg() {
6677
; BE-BF16-NEXT: mov.w r0, #16256
6778
; BE-BF16-NEXT: bl callee_soft_bfloat_in_reg
6879
; BE-BF16-NEXT: pop {r7, pc}
80+
;
81+
; LE-GISEL-LABEL: caller_soft_bfloat_in_reg:
82+
; LE-GISEL: @ %bb.0: @ %entry
83+
; LE-GISEL-NEXT: .save {r7, lr}
84+
; LE-GISEL-NEXT: push {r7, lr}
85+
; LE-GISEL-NEXT: mov.w r0, #16256
86+
; LE-GISEL-NEXT: bl callee_soft_bfloat_in_reg
87+
; LE-GISEL-NEXT: pop {r7, pc}
6988
entry:
7089
%ret = call arm_aapcscc bfloat @callee_soft_bfloat_in_reg(bfloat 1.0)
7190
ret void
@@ -91,6 +110,12 @@ define arm_aapcscc bfloat @callee_soft_bfloat_on_stack(float %r0, float %r1, flo
91110
; BE-BF16: @ %bb.0: @ %entry
92111
; BE-BF16-NEXT: ldrh.w r0, [sp, #2]
93112
; BE-BF16-NEXT: bx lr
113+
;
114+
; LE-GISEL-LABEL: callee_soft_bfloat_on_stack:
115+
; LE-GISEL: @ %bb.0: @ %entry
116+
; LE-GISEL-NEXT: mov r0, sp
117+
; LE-GISEL-NEXT: ldr r0, [r0]
118+
; LE-GISEL-NEXT: bx lr
94119
entry:
95120
ret bfloat %f
96121
}
@@ -143,6 +168,18 @@ define void @caller_soft_bfloat_on_stack() {
143168
; BE-BF16-NEXT: bl callee_soft_bfloat_on_stack
144169
; BE-BF16-NEXT: add sp, #8
145170
; BE-BF16-NEXT: pop {r7, pc}
171+
;
172+
; LE-GISEL-LABEL: caller_soft_bfloat_on_stack:
173+
; LE-GISEL: @ %bb.0: @ %entry
174+
; LE-GISEL-NEXT: .save {r7, lr}
175+
; LE-GISEL-NEXT: push {r7, lr}
176+
; LE-GISEL-NEXT: .pad #8
177+
; LE-GISEL-NEXT: sub sp, #8
178+
; LE-GISEL-NEXT: mov.w r0, #16256
179+
; LE-GISEL-NEXT: str r0, [sp]
180+
; LE-GISEL-NEXT: bl callee_soft_bfloat_on_stack
181+
; LE-GISEL-NEXT: add sp, #8
182+
; LE-GISEL-NEXT: pop {r7, pc}
146183
entry:
147184
%ret = call arm_aapcscc bfloat @callee_soft_bfloat_on_stack(float poison, float poison, float poison, float poison, bfloat 1.0)
148185
ret void
@@ -178,6 +215,10 @@ define arm_aapcs_vfpcc bfloat @callee_hard_bfloat_in_reg(bfloat %f) {
178215
; BE-BF16-NEXT: vmov s0, r0
179216
; BE-BF16-NEXT: add sp, #4
180217
; BE-BF16-NEXT: bx lr
218+
;
219+
; LE-GISEL-LABEL: callee_hard_bfloat_in_reg:
220+
; LE-GISEL: @ %bb.0: @ %entry
221+
; LE-GISEL-NEXT: bx lr
181222
entry:
182223
ret bfloat %f
183224
}
@@ -230,6 +271,18 @@ define void @caller_hard_bfloat_in_reg() {
230271
; BE-BF16-NEXT: @ %bb.1:
231272
; BE-BF16-NEXT: .LCPI5_0:
232273
; BE-BF16-NEXT: .long 0x00003f80 @ float 2.27795078E-41
274+
;
275+
; LE-GISEL-LABEL: caller_hard_bfloat_in_reg:
276+
; LE-GISEL: @ %bb.0: @ %entry
277+
; LE-GISEL-NEXT: .save {r7, lr}
278+
; LE-GISEL-NEXT: push {r7, lr}
279+
; LE-GISEL-NEXT: vldr s0, .LCPI5_0
280+
; LE-GISEL-NEXT: bl callee_hard_bfloat_in_reg
281+
; LE-GISEL-NEXT: pop {r7, pc}
282+
; LE-GISEL-NEXT: .p2align 2
283+
; LE-GISEL-NEXT: @ %bb.1:
284+
; LE-GISEL-NEXT: .LCPI5_0:
285+
; LE-GISEL-NEXT: .long 0x00003f80 @ float 2.27795078E-41
233286
entry:
234287
%ret = call arm_aapcs_vfpcc bfloat @callee_hard_bfloat_in_reg(bfloat 1.0)
235288
ret void
@@ -257,6 +310,13 @@ define arm_aapcs_vfpcc bfloat @callee_hard_bfloat_on_stack(float %s0, float %s1,
257310
; BE-BF16-NEXT: ldrh.w r0, [sp, #2]
258311
; BE-BF16-NEXT: vmov s0, r0
259312
; BE-BF16-NEXT: bx lr
313+
;
314+
; LE-GISEL-LABEL: callee_hard_bfloat_on_stack:
315+
; LE-GISEL: @ %bb.0: @ %entry
316+
; LE-GISEL-NEXT: mov r0, sp
317+
; LE-GISEL-NEXT: ldr r0, [r0]
318+
; LE-GISEL-NEXT: vmov s0, r0
319+
; LE-GISEL-NEXT: bx lr
260320
entry:
261321
ret bfloat %f
262322
}
@@ -310,6 +370,18 @@ define void @caller_hard_bfloat_on_stack() {
310370
; BE-BF16-NEXT: bl callee_hard_bfloat_on_stack
311371
; BE-BF16-NEXT: add sp, #8
312372
; BE-BF16-NEXT: pop {r7, pc}
373+
;
374+
; LE-GISEL-LABEL: caller_hard_bfloat_on_stack:
375+
; LE-GISEL: @ %bb.0: @ %entry
376+
; LE-GISEL-NEXT: .save {r7, lr}
377+
; LE-GISEL-NEXT: push {r7, lr}
378+
; LE-GISEL-NEXT: .pad #8
379+
; LE-GISEL-NEXT: sub sp, #8
380+
; LE-GISEL-NEXT: mov.w r0, #16256
381+
; LE-GISEL-NEXT: str r0, [sp]
382+
; LE-GISEL-NEXT: bl callee_hard_bfloat_on_stack
383+
; LE-GISEL-NEXT: add sp, #8
384+
; LE-GISEL-NEXT: pop {r7, pc}
313385
entry:
314386
%ret = call arm_aapcs_vfpcc bfloat @callee_hard_bfloat_on_stack(float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, bfloat 1.0)
315387
ret void

‎llvm/test/CodeGen/Thumb2/fp16-pcs.ll‎

Lines changed: 72 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,13 @@
44
; RUN: llc -mtriple=armv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16,+fullfp16 | FileCheck %s --check-prefix=LE-FP16
55
; RUN: llc -mtriple=armebv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16,+fullfp16 | FileCheck %s --check-prefix=BE-FP16
66

7+
;; Global ISel successfully generates code for some functions for little-endian
8+
;; without +fullfp16, and falls back to SelectionDAG in all others.
9+
; RUN: llc -mtriple=armv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16 -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefix=LE-GISEL
10+
; RUN: llc -mtriple=armebv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16 -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefix=BE
11+
; RUN: llc -mtriple=armv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16,+fullfp16 -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefix=LE-FP16
12+
; RUN: llc -mtriple=armebv8m.main-none-eabi < %s -frame-pointer=none -mattr=+fp-armv8d16,+fullfp16 -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefix=BE-FP16
13+
714
define arm_aapcscc half @callee_soft_half_in_reg(half %f) {
815
; LE-LABEL: callee_soft_half_in_reg:
916
; LE: @ %bb.0: @ %entry
@@ -24,6 +31,10 @@ define arm_aapcscc half @callee_soft_half_in_reg(half %f) {
2431
; BE-FP16-NEXT: vmov.f16 s0, r0
2532
; BE-FP16-NEXT: vmov r0, s0
2633
; BE-FP16-NEXT: bx lr
34+
;
35+
; LE-GISEL-LABEL: callee_soft_half_in_reg:
36+
; LE-GISEL: @ %bb.0: @ %entry
37+
; LE-GISEL-NEXT: bx lr
2738
entry:
2839
ret half %f
2940
}
@@ -60,6 +71,14 @@ define void @caller_soft_half_in_reg() {
6071
; BE-FP16-NEXT: mov.w r0, #15360
6172
; BE-FP16-NEXT: bl callee_soft_half_in_reg
6273
; BE-FP16-NEXT: pop {r7, pc}
74+
;
75+
; LE-GISEL-LABEL: caller_soft_half_in_reg:
76+
; LE-GISEL: @ %bb.0: @ %entry
77+
; LE-GISEL-NEXT: .save {r7, lr}
78+
; LE-GISEL-NEXT: push {r7, lr}
79+
; LE-GISEL-NEXT: mov.w r0, #15360
80+
; LE-GISEL-NEXT: bl callee_soft_half_in_reg
81+
; LE-GISEL-NEXT: pop {r7, pc}
6382
entry:
6483
%ret = call arm_aapcscc half @callee_soft_half_in_reg(half 1.0)
6584
ret void
@@ -87,6 +106,12 @@ define arm_aapcscc half @callee_soft_half_on_stack(float %r0, float %r1, float %
87106
; BE-FP16-NEXT: vldr.16 s0, [sp, #2]
88107
; BE-FP16-NEXT: vmov r0, s0
89108
; BE-FP16-NEXT: bx lr
109+
;
110+
; LE-GISEL-LABEL: callee_soft_half_on_stack:
111+
; LE-GISEL: @ %bb.0: @ %entry
112+
; LE-GISEL-NEXT: mov r0, sp
113+
; LE-GISEL-NEXT: ldr r0, [r0]
114+
; LE-GISEL-NEXT: bx lr
90115
entry:
91116
ret half %f
92117
}
@@ -139,6 +164,18 @@ define void @caller_soft_half_on_stack() {
139164
; BE-FP16-NEXT: bl callee_soft_half_on_stack
140165
; BE-FP16-NEXT: add sp, #8
141166
; BE-FP16-NEXT: pop {r7, pc}
167+
;
168+
; LE-GISEL-LABEL: caller_soft_half_on_stack:
169+
; LE-GISEL: @ %bb.0: @ %entry
170+
; LE-GISEL-NEXT: .save {r7, lr}
171+
; LE-GISEL-NEXT: push {r7, lr}
172+
; LE-GISEL-NEXT: .pad #8
173+
; LE-GISEL-NEXT: sub sp, #8
174+
; LE-GISEL-NEXT: mov.w r0, #15360
175+
; LE-GISEL-NEXT: str r0, [sp]
176+
; LE-GISEL-NEXT: bl callee_soft_half_on_stack
177+
; LE-GISEL-NEXT: add sp, #8
178+
; LE-GISEL-NEXT: pop {r7, pc}
142179
entry:
143180
%ret = call arm_aapcscc half @callee_soft_half_on_stack(float poison, float poison, float poison, float poison, half 1.0)
144181
ret void
@@ -160,6 +197,10 @@ define arm_aapcs_vfpcc half @callee_hard_half_in_reg(half %f) {
160197
; BE-FP16-LABEL: callee_hard_half_in_reg:
161198
; BE-FP16: @ %bb.0: @ %entry
162199
; BE-FP16-NEXT: bx lr
200+
;
201+
; LE-GISEL-LABEL: callee_hard_half_in_reg:
202+
; LE-GISEL: @ %bb.0: @ %entry
203+
; LE-GISEL-NEXT: bx lr
163204
entry:
164205
ret half %f
165206
}
@@ -204,6 +245,18 @@ define void @caller_hard_half_in_reg() {
204245
; BE-FP16-NEXT: vmov.f16 s0, #1.000000e+00
205246
; BE-FP16-NEXT: bl callee_hard_half_in_reg
206247
; BE-FP16-NEXT: pop {r7, pc}
248+
;
249+
; LE-GISEL-LABEL: caller_hard_half_in_reg:
250+
; LE-GISEL: @ %bb.0: @ %entry
251+
; LE-GISEL-NEXT: .save {r7, lr}
252+
; LE-GISEL-NEXT: push {r7, lr}
253+
; LE-GISEL-NEXT: vldr s0, .LCPI5_0
254+
; LE-GISEL-NEXT: bl callee_hard_half_in_reg
255+
; LE-GISEL-NEXT: pop {r7, pc}
256+
; LE-GISEL-NEXT: .p2align 2
257+
; LE-GISEL-NEXT: @ %bb.1:
258+
; LE-GISEL-NEXT: .LCPI5_0:
259+
; LE-GISEL-NEXT: .long 0x00003c00 @ float 2.15239444E-41
207260
entry:
208261
%ret = call arm_aapcs_vfpcc half @callee_hard_half_in_reg(half 1.0)
209262
ret void
@@ -229,6 +282,13 @@ define arm_aapcs_vfpcc half @callee_hard_half_on_stack(float %s0, float %s1, flo
229282
; BE-FP16: @ %bb.0: @ %entry
230283
; BE-FP16-NEXT: vldr.16 s0, [sp, #2]
231284
; BE-FP16-NEXT: bx lr
285+
;
286+
; LE-GISEL-LABEL: callee_hard_half_on_stack:
287+
; LE-GISEL: @ %bb.0: @ %entry
288+
; LE-GISEL-NEXT: mov r0, sp
289+
; LE-GISEL-NEXT: ldr r0, [r0]
290+
; LE-GISEL-NEXT: vmov s0, r0
291+
; LE-GISEL-NEXT: bx lr
232292
entry:
233293
ret half %f
234294
}
@@ -282,6 +342,18 @@ define void @caller_hard_half_on_stack() {
282342
; BE-FP16-NEXT: bl callee_hard_half_on_stack
283343
; BE-FP16-NEXT: add sp, #8
284344
; BE-FP16-NEXT: pop {r7, pc}
345+
;
346+
; LE-GISEL-LABEL: caller_hard_half_on_stack:
347+
; LE-GISEL: @ %bb.0: @ %entry
348+
; LE-GISEL-NEXT: .save {r7, lr}
349+
; LE-GISEL-NEXT: push {r7, lr}
350+
; LE-GISEL-NEXT: .pad #8
351+
; LE-GISEL-NEXT: sub sp, #8
352+
; LE-GISEL-NEXT: mov.w r0, #15360
353+
; LE-GISEL-NEXT: str r0, [sp]
354+
; LE-GISEL-NEXT: bl callee_hard_half_on_stack
355+
; LE-GISEL-NEXT: add sp, #8
356+
; LE-GISEL-NEXT: pop {r7, pc}
285357
entry:
286358
%ret = call arm_aapcs_vfpcc half @callee_hard_half_on_stack(float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, float poison, half 1.0)
287359
ret void

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