|
100 | 100 | ret void |
101 | 101 | } |
102 | 102 |
|
103 | | - define i64 @vsetvli_vleff() { |
104 | | - bb0: |
105 | | - br i1 poison, label %bb1, label %bb2 |
106 | | - bb1: |
107 | | - %0 = tail call { <vscale x 4 x i16>, i64 } @llvm.riscv.vleff.nxv4i16.i64(<vscale x 4 x i16> zeroinitializer, ptr null, i64 0) |
108 | | - %1 = extractvalue { <vscale x 4 x i16>, i64 } %0, 1 |
109 | | - br label %bb2 |
110 | | - bb2: |
111 | | - %x8 = phi i64 [%1, %bb1], [0, %bb0] |
112 | | - ret i64 %x8 |
| 103 | + define void @vsetvli_vleff() { |
| 104 | + ret void |
113 | 105 | } |
114 | 106 |
|
115 | 107 | declare <vscale x 1 x i64> @llvm.riscv.vadd.nxv1i64.nxv1i64.i64(<vscale x 1 x i64>, <vscale x 1 x i64>, <vscale x 1 x i64>, i64) #1 |
@@ -640,38 +632,35 @@ name: vsetvli_vleff |
640 | 632 | tracksRegLiveness: true |
641 | 633 | body: | |
642 | 634 | ; CHECK-LABEL: name: vsetvli_vleff |
643 | | - ; CHECK: bb.0.bb0: |
| 635 | + ; CHECK: bb.0: |
644 | 636 | ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
645 | 637 | ; CHECK-NEXT: {{ $}} |
646 | | - ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x0 |
| 638 | + ; CHECK-NEXT: %vl:gpr = COPY $x0 |
647 | 639 | ; CHECK-NEXT: BNE $x0, $x0, %bb.2 |
648 | 640 | ; CHECK-NEXT: PseudoBR %bb.1 |
649 | 641 | ; CHECK-NEXT: {{ $}} |
650 | | - ; CHECK-NEXT: bb.1.bb1: |
| 642 | + ; CHECK-NEXT: bb.1: |
651 | 643 | ; CHECK-NEXT: successors: %bb.2(0x80000000) |
652 | 644 | ; CHECK-NEXT: {{ $}} |
653 | | - ; CHECK-NEXT: dead [[PseudoVSETVLIX0_:%[0-9]+]]:gprnox0 = PseudoVSETVLIX0 killed $x0, 200 /* e16, m1, ta, ma */, implicit-def $vl, implicit-def $vtype |
654 | | - ; CHECK-NEXT: renamable $v8 = PseudoVMV_V_I_M1 undef renamable $v8, 0, -1, 4 /* e16 */, 0 /* tu, mu */, implicit $vl, implicit $vtype |
655 | | - ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 136 /* e16, m1, tu, ma */, implicit-def $vl, implicit-def $vtype |
656 | | - ; CHECK-NEXT: dead renamable $v8, $x0 = PseudoVLE16FF_V_M1 killed renamable $v8, $x0, 0, 4 /* e16 */, 2 /* tu, ma */, implicit-def dead $vl, implicit $vl, implicit $vtype :: (load unknown-size from `ptr null`, align 2) |
657 | | - ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = PseudoReadVL implicit $vl |
| 645 | + ; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 200 /* e16, m1, ta, ma */, implicit-def $vl, implicit-def $vtype |
| 646 | + ; CHECK-NEXT: $noreg, $x0 = PseudoVLE16FF_V_M1 $noreg, $noreg, 0, 4 /* e16 */, 2 /* tu, ma */, implicit $vl, implicit $vtype, implicit-def $vl |
| 647 | + ; CHECK-NEXT: %vl:gpr = PseudoReadVL implicit $vl |
658 | 648 | ; CHECK-NEXT: {{ $}} |
659 | | - ; CHECK-NEXT: bb.2.bb2: |
660 | | - ; CHECK-NEXT: $x10 = COPY [[COPY]] |
| 649 | + ; CHECK-NEXT: bb.2: |
| 650 | + ; CHECK-NEXT: $x10 = COPY %vl |
661 | 651 | ; CHECK-NEXT: PseudoRET implicit killed $x10 |
662 | | - bb.0.bb0: |
| 652 | + bb.0: |
663 | 653 | successors: %bb.1(0x40000000), %bb.2(0x40000000) |
664 | 654 |
|
665 | | - %9:gpr = COPY $x0 |
| 655 | + %vl:gpr = COPY $x0 |
666 | 656 | BNE $x0, $x0, %bb.2 |
667 | 657 | PseudoBR %bb.1 |
668 | 658 |
|
669 | | - bb.1.bb1: |
| 659 | + bb.1: |
670 | 660 | successors: %bb.2(0x80000000) |
671 | 661 |
|
672 | | - renamable $v8 = PseudoVMV_V_I_M1 undef renamable $v8, 0, -1, 4 /* e16 */, 0 /* tu, mu */ |
673 | | - dead renamable $v8, %9:gpr = PseudoVLE16FF_V_M1 killed renamable $v8, $x0, 0, 4 /* e16 */, 2 /* tu, ma */, implicit-def dead $vl :: (load unknown-size from `ptr null`, align 2) |
| 662 | + $noreg, %vl:gpr = PseudoVLE16FF_V_M1 $noreg, $noreg, 0, 4 /* e16 */, 2 /* tu, ma */ |
674 | 663 |
|
675 | | - bb.2.bb2: |
676 | | - $x10 = COPY %9 |
| 664 | + bb.2: |
| 665 | + $x10 = COPY %vl |
677 | 666 | PseudoRET implicit killed $x10 |
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