[X86] Added optimizations for fp to signed & unsigned i32 conversions.

KavinTheG · KavinTheG · commit 819fcd818f1d · 2025-10-28T19:12:16.000-04:00
Extends lowerFPToIntToFP to support i32 conversions on both VLX + DQ
and DQ targets, as well as modifies appropriate test cases.
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -19933,7 +19933,7 @@ static SDValue lowerFPToIntToFP(SDValue CastToFP, const SDLoc &DL,
   // See if we have 128-bit vector cast instructions for this type of cast.
   // We need cvttps2dq/cvttpd2dq and cvtdq2ps/cvtdq2pd.
   if (!Subtarget.hasSSE2() || (VT != MVT::f32 && VT != MVT::f64) ||
-      !(IntVT == MVT::i32 || (IntVT == MVT::i64 && Subtarget.hasDQI())))
+      (IntVT != MVT::i32 && IntVT != MVT::i64))
     return SDValue();
 
   unsigned SrcSize = SrcVT.getSizeInBits();
@@ -19943,7 +19943,7 @@ static SDValue lowerFPToIntToFP(SDValue CastToFP, const SDLoc &DL,
   unsigned Width = 128;
   bool IsUnsigned = CastToInt.getOpcode() == ISD::FP_TO_UINT;
 
-  if (Subtarget.hasVLX() && IntVT == MVT::i64) {
+  if (Subtarget.hasVLX() && Subtarget.hasDQI()) {
     // AVX512DQ+VLX
     if (IsUnsigned) {
       ToIntOpcode =
@@ -19956,14 +19956,14 @@ static SDValue lowerFPToIntToFP(SDValue CastToFP, const SDLoc &DL,
       ToFPOpcode =
           IntSize != VTSize ? X86ISD::CVTSI2P : (unsigned)ISD::SINT_TO_FP;
     }
-  } else if (IntVT == MVT::i64) {
-    // Need to extend width for AVX512DQ without AVX512VL
+  } else if (Subtarget.hasDQI()) {
+    // Need to extend width for AVX512DQ without AVX512VL.
     Width = 512;
     ToIntOpcode = CastToInt.getOpcode();
     ToFPOpcode = IsUnsigned ? ISD::UINT_TO_FP : ISD::SINT_TO_FP;
   } else {
-    // SSE2
-    if (IsUnsigned)
+    // SSE2 can only perform f64/f32 <-> i32 signed.
+    if (IsUnsigned || IntVT == MVT::i64)
       return SDValue();
     ToIntOpcode =
         SrcSize != IntSize ? X86ISD::CVTTP2SI : (unsigned)ISD::FP_TO_SINT;
@@ -19972,18 +19972,19 @@ static SDValue lowerFPToIntToFP(SDValue CastToFP, const SDLoc &DL,
   }
 
   MVT VecSrcVT, VecIntVT, VecVT;
-  unsigned NumElts = Width / IntSize;
-  VecIntVT = MVT::getVectorVT(IntVT, NumElts);
+  unsigned NumElts;
   unsigned SrcElts, VTElts;
-  // vcvttps2qq cannot convert v16f32 <-> v8i64
-  if (IntVT == MVT::i64 && Width == 512) {
+  // Some conversions are only legal with uniform vector sizes on AVXDQ.
+  if (Width == 512) {
+    NumElts = std::min(Width / IntSize, Width / SrcSize);
     SrcElts = NumElts;
     VTElts = NumElts;
   } else {
+    NumElts = Width / IntSize;
     SrcElts = Width / SrcSize;
     VTElts = Width / VTSize;
   }
-
+  VecIntVT = MVT::getVectorVT(IntVT, NumElts);
   VecSrcVT = MVT::getVectorVT(SrcVT, SrcElts);
   VecVT = MVT::getVectorVT(VT, VTElts);
   // sint_to_fp (fp_to_sint X) --> extelt (sint_to_fp (fp_to_sint (s2v X))), 0
diff --git a/llvm/test/CodeGen/X86/fp-int-fp-cvt.ll b/llvm/test/CodeGen/X86/fp-int-fp-cvt.ll
@@ -16,11 +16,26 @@ define double @scvtf64_i32(double %a0) {
 ; SSE-NEXT:    cvtdq2pd %xmm0, %xmm0
 ; SSE-NEXT:    retq
 ;
-; AVX-LABEL: scvtf64_i32:
-; AVX:       # %bb.0:
-; AVX-NEXT:    vcvttpd2dq %xmm0, %xmm0
-; AVX-NEXT:    vcvtdq2pd %xmm0, %xmm0
-; AVX-NEXT:    retq
+; AVX2-LABEL: scvtf64_i32:
+; AVX2:       # %bb.0:
+; AVX2-NEXT:    vcvttpd2dq %xmm0, %xmm0
+; AVX2-NEXT:    vcvtdq2pd %xmm0, %xmm0
+; AVX2-NEXT:    retq
+;
+; AVX512-VL-LABEL: scvtf64_i32:
+; AVX512-VL:       # %bb.0:
+; AVX512-VL-NEXT:    vcvttpd2dq %xmm0, %xmm0
+; AVX512-VL-NEXT:    vcvtdq2pd %xmm0, %xmm0
+; AVX512-VL-NEXT:    retq
+;
+; AVX512-NOVL-LABEL: scvtf64_i32:
+; AVX512-NOVL:       # %bb.0:
+; AVX512-NOVL-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512-NOVL-NEXT:    vcvttpd2dq %zmm0, %ymm0
+; AVX512-NOVL-NEXT:    vcvtdq2pd %ymm0, %zmm0
+; AVX512-NOVL-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512-NOVL-NEXT:    vzeroupper
+; AVX512-NOVL-NEXT:    retq
   %ii = fptosi double %a0 to i32
   %ff = sitofp i32 %ii to double
   ret double %ff
@@ -129,11 +144,20 @@ define double @ucvtf64_i32(double %a0) {
 ; AVX2-NEXT:    vcvtsi2sd %rax, %xmm15, %xmm0
 ; AVX2-NEXT:    retq
 ;
-; AVX512-LABEL: ucvtf64_i32:
-; AVX512:       # %bb.0:
-; AVX512-NEXT:    vcvttsd2usi %xmm0, %eax
-; AVX512-NEXT:    vcvtusi2sd %eax, %xmm15, %xmm0
-; AVX512-NEXT:    retq
+; AVX512-VL-LABEL: ucvtf64_i32:
+; AVX512-VL:       # %bb.0:
+; AVX512-VL-NEXT:    vcvttpd2udq %xmm0, %xmm0
+; AVX512-VL-NEXT:    vcvtudq2pd %xmm0, %xmm0
+; AVX512-VL-NEXT:    retq
+;
+; AVX512-NOVL-LABEL: ucvtf64_i32:
+; AVX512-NOVL:       # %bb.0:
+; AVX512-NOVL-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512-NOVL-NEXT:    vcvttpd2udq %zmm0, %ymm0
+; AVX512-NOVL-NEXT:    vcvtudq2pd %ymm0, %zmm0
+; AVX512-NOVL-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512-NOVL-NEXT:    vzeroupper
+; AVX512-NOVL-NEXT:    retq
   %ii = fptoui double %a0 to i32
   %ff = uitofp i32 %ii to double
   ret double %ff
@@ -208,11 +232,20 @@ define float @ucvtf32_i32(float %a0) {
 ; AVX2-NEXT:    vcvtsi2ss %rax, %xmm15, %xmm0
 ; AVX2-NEXT:    retq
 ;
-; AVX512-LABEL: ucvtf32_i32:
-; AVX512:       # %bb.0:
-; AVX512-NEXT:    vcvttss2usi %xmm0, %eax
-; AVX512-NEXT:    vcvtusi2ss %eax, %xmm15, %xmm0
-; AVX512-NEXT:    retq
+; AVX512-VL-LABEL: ucvtf32_i32:
+; AVX512-VL:       # %bb.0:
+; AVX512-VL-NEXT:    vcvttps2udq %xmm0, %xmm0
+; AVX512-VL-NEXT:    vcvtudq2ps %xmm0, %xmm0
+; AVX512-VL-NEXT:    retq
+;
+; AVX512-NOVL-LABEL: ucvtf32_i32:
+; AVX512-NOVL:       # %bb.0:
+; AVX512-NOVL-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512-NOVL-NEXT:    vcvttps2udq %zmm0, %zmm0
+; AVX512-NOVL-NEXT:    vcvtudq2ps %zmm0, %zmm0
+; AVX512-NOVL-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512-NOVL-NEXT:    vzeroupper
+; AVX512-NOVL-NEXT:    retq
   %ii = fptoui float %a0 to i32
   %ff = uitofp i32 %ii to float
   ret float %ff
@@ -283,3 +316,5 @@ define float @ucvtf32_i64(float %a0) {
   %ff = uitofp i64 %ii to float
   ret float %ff
 }
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; AVX512: {{.*}}
diff --git a/llvm/test/CodeGen/X86/isint.ll b/llvm/test/CodeGen/X86/isint.ll
@@ -237,8 +237,8 @@ define i32 @isuint_return(double %d) nounwind {
 ;
 ; AVX512VL-LABEL: isuint_return:
 ; AVX512VL:       # %bb.0:
-; AVX512VL-NEXT:    vcvttsd2usi %xmm0, %eax
-; AVX512VL-NEXT:    vcvtusi2sd %eax, %xmm15, %xmm1
+; AVX512VL-NEXT:    vcvttpd2udq %xmm0, %xmm1
+; AVX512VL-NEXT:    vcvtudq2pd %xmm1, %xmm1
 ; AVX512VL-NEXT:    vcmpeqsd %xmm1, %xmm0, %k0
 ; AVX512VL-NEXT:    kmovw %k0, %eax
 ; AVX512VL-NEXT:    retq
diff --git a/llvm/test/CodeGen/X86/setoeq.ll b/llvm/test/CodeGen/X86/setoeq.ll
@@ -86,8 +86,8 @@ define zeroext i8 @oeq_f64_u32(double %x) nounwind readnone {
 ; AVX512-LABEL: oeq_f64_u32:
 ; AVX512:       # %bb.0: # %entry
 ; AVX512-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
-; AVX512-NEXT:    vcvttsd2usi %xmm0, %eax
-; AVX512-NEXT:    vcvtusi2sd %eax, %xmm7, %xmm1
+; AVX512-NEXT:    vcvttpd2udq %xmm0, %xmm1
+; AVX512-NEXT:    vcvtudq2pd %xmm1, %xmm1
 ; AVX512-NEXT:    vcmpeqsd %xmm0, %xmm1, %k0
 ; AVX512-NEXT:    kmovd %k0, %eax
 ; AVX512-NEXT:    # kill: def $al killed $al killed $eax
@@ -350,8 +350,8 @@ define zeroext i8 @une_f64_u32(double %x) nounwind readnone {
 ; AVX512-LABEL: une_f64_u32:
 ; AVX512:       # %bb.0: # %entry
 ; AVX512-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
-; AVX512-NEXT:    vcvttsd2usi %xmm0, %eax
-; AVX512-NEXT:    vcvtusi2sd %eax, %xmm7, %xmm1
+; AVX512-NEXT:    vcvttpd2udq %xmm0, %xmm1
+; AVX512-NEXT:    vcvtudq2pd %xmm1, %xmm1
 ; AVX512-NEXT:    vcmpneqsd %xmm0, %xmm1, %k0
 ; AVX512-NEXT:    kmovd %k0, %eax
 ; AVX512-NEXT:    # kill: def $al killed $al killed $eax
