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sunshaocesunshaoce
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Remove extra ADD
1 parent 80f8c3b commit 81c6378

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4 files changed

+162
-198
lines changed

4 files changed

+162
-198
lines changed

‎llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp‎

Lines changed: 1 addition & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -743,15 +743,7 @@ bool RISCVInstructionSelector::select(MachineInstr &MI) {
743743

744744
if (!Subtarget->hasStdExtF() &&
745745
(Size == 32 || (Size == 64 && Subtarget->is64Bit()))) {
746-
// No fp extension, so we need to go through GPRs.
747-
Register GPRReg = MRI->createVirtualRegister(&RISCV::GPRRegClass);
748-
if (!materializeImm(GPRReg, Imm.getSExtValue(), MIB))
749-
return false;
750-
751-
unsigned Opcode =
752-
(Subtarget->is64Bit() && Size == 32) ? RISCV::ADDW : RISCV::ADD;
753-
auto MV = MIB.buildInstr(Opcode, {DstReg}, {GPRReg, Register(RISCV::X0)});
754-
if (!MV.constrainAllUses(TII, TRI, RBI))
746+
if (!materializeImm(DstReg, Imm.getSExtValue(), MIB))
755747
return false;
756748

757749
MI.eraseFromParent();

‎llvm/test/CodeGen/RISCV/GlobalISel/double-arith.ll‎

Lines changed: 48 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -598,33 +598,31 @@ define double @fnmadd_d(double %a, double %b, double %c) nounwind {
598598
;
599599
; RV64I-LABEL: fnmadd_d:
600600
; RV64I: # %bb.0:
601-
; RV64I-NEXT: addi sp, sp, -48
602-
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
603-
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
604-
; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
605-
; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
606-
; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
601+
; RV64I-NEXT: addi sp, sp, -32
602+
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
603+
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
604+
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
605+
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
607606
; RV64I-NEXT: mv s0, a1
608607
; RV64I-NEXT: mv s1, a2
609608
; RV64I-NEXT: li a1, 0
610609
; RV64I-NEXT: call __adddf3
611-
; RV64I-NEXT: mv s3, a0
610+
; RV64I-NEXT: mv s2, a0
612611
; RV64I-NEXT: mv a0, s1
613612
; RV64I-NEXT: li a1, 0
614613
; RV64I-NEXT: call __adddf3
615614
; RV64I-NEXT: li a1, -1
616615
; RV64I-NEXT: slli a2, a1, 63
617-
; RV64I-NEXT: xor a1, s3, a2
616+
; RV64I-NEXT: xor a1, s2, a2
618617
; RV64I-NEXT: xor a2, a0, a2
619618
; RV64I-NEXT: mv a0, a1
620619
; RV64I-NEXT: mv a1, s0
621620
; RV64I-NEXT: call fma
622-
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
623-
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
624-
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
625-
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
626-
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
627-
; RV64I-NEXT: addi sp, sp, 48
621+
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
622+
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
623+
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
624+
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
625+
; RV64I-NEXT: addi sp, sp, 32
628626
; RV64I-NEXT: ret
629627
%a_ = fadd double 0.0, %a
630628
%c_ = fadd double 0.0, %c
@@ -705,33 +703,31 @@ define double @fnmadd_d_2(double %a, double %b, double %c) nounwind {
705703
;
706704
; RV64I-LABEL: fnmadd_d_2:
707705
; RV64I: # %bb.0:
708-
; RV64I-NEXT: addi sp, sp, -48
709-
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
710-
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
711-
; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
712-
; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
713-
; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
706+
; RV64I-NEXT: addi sp, sp, -32
707+
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
708+
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
709+
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
710+
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
714711
; RV64I-NEXT: mv s0, a0
715712
; RV64I-NEXT: mv a0, a1
716713
; RV64I-NEXT: mv s1, a2
717714
; RV64I-NEXT: li a1, 0
718715
; RV64I-NEXT: call __adddf3
719-
; RV64I-NEXT: mv s3, a0
716+
; RV64I-NEXT: mv s2, a0
720717
; RV64I-NEXT: mv a0, s1
721718
; RV64I-NEXT: li a1, 0
722719
; RV64I-NEXT: call __adddf3
723720
; RV64I-NEXT: li a1, -1
724721
; RV64I-NEXT: slli a2, a1, 63
725-
; RV64I-NEXT: xor a1, s3, a2
722+
; RV64I-NEXT: xor a1, s2, a2
726723
; RV64I-NEXT: xor a2, a0, a2
727724
; RV64I-NEXT: mv a0, s0
728725
; RV64I-NEXT: call fma
729-
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
730-
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
731-
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
732-
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
733-
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
734-
; RV64I-NEXT: addi sp, sp, 48
726+
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
727+
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
728+
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
729+
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
730+
; RV64I-NEXT: addi sp, sp, 32
735731
; RV64I-NEXT: ret
736732
%b_ = fadd double 0.0, %b
737733
%c_ = fadd double 0.0, %c
@@ -1178,17 +1174,16 @@ define double @fnmadd_d_contract(double %a, double %b, double %c) nounwind {
11781174
;
11791175
; RV64I-LABEL: fnmadd_d_contract:
11801176
; RV64I: # %bb.0:
1181-
; RV64I-NEXT: addi sp, sp, -48
1182-
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
1183-
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
1184-
; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
1185-
; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
1186-
; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
1177+
; RV64I-NEXT: addi sp, sp, -32
1178+
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
1179+
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
1180+
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
1181+
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
11871182
; RV64I-NEXT: mv s0, a1
11881183
; RV64I-NEXT: mv s1, a2
11891184
; RV64I-NEXT: li a1, 0
11901185
; RV64I-NEXT: call __adddf3
1191-
; RV64I-NEXT: mv s3, a0
1186+
; RV64I-NEXT: mv s2, a0
11921187
; RV64I-NEXT: mv a0, s0
11931188
; RV64I-NEXT: li a1, 0
11941189
; RV64I-NEXT: call __adddf3
@@ -1197,20 +1192,19 @@ define double @fnmadd_d_contract(double %a, double %b, double %c) nounwind {
11971192
; RV64I-NEXT: li a1, 0
11981193
; RV64I-NEXT: call __adddf3
11991194
; RV64I-NEXT: mv s1, a0
1200-
; RV64I-NEXT: mv a0, s3
1195+
; RV64I-NEXT: mv a0, s2
12011196
; RV64I-NEXT: mv a1, s0
12021197
; RV64I-NEXT: call __muldf3
12031198
; RV64I-NEXT: li a1, -1
12041199
; RV64I-NEXT: slli a1, a1, 63
12051200
; RV64I-NEXT: xor a0, a0, a1
12061201
; RV64I-NEXT: mv a1, s1
12071202
; RV64I-NEXT: call __subdf3
1208-
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
1209-
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
1210-
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
1211-
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
1212-
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
1213-
; RV64I-NEXT: addi sp, sp, 48
1203+
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
1204+
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
1205+
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
1206+
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
1207+
; RV64I-NEXT: addi sp, sp, 32
12141208
; RV64I-NEXT: ret
12151209
%a_ = fadd double 0.0, %a ; avoid negation using xor
12161210
%b_ = fadd double 0.0, %b ; avoid negation using xor
@@ -1292,32 +1286,30 @@ define double @fnmsub_d_contract(double %a, double %b, double %c) nounwind {
12921286
;
12931287
; RV64I-LABEL: fnmsub_d_contract:
12941288
; RV64I: # %bb.0:
1295-
; RV64I-NEXT: addi sp, sp, -48
1296-
; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
1297-
; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
1298-
; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
1299-
; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
1300-
; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
1289+
; RV64I-NEXT: addi sp, sp, -32
1290+
; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
1291+
; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
1292+
; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
1293+
; RV64I-NEXT: sd s2, 0(sp) # 8-byte Folded Spill
13011294
; RV64I-NEXT: mv s0, a1
13021295
; RV64I-NEXT: mv s1, a2
13031296
; RV64I-NEXT: li a1, 0
13041297
; RV64I-NEXT: call __adddf3
1305-
; RV64I-NEXT: mv s3, a0
1298+
; RV64I-NEXT: mv s2, a0
13061299
; RV64I-NEXT: mv a0, s0
13071300
; RV64I-NEXT: li a1, 0
13081301
; RV64I-NEXT: call __adddf3
13091302
; RV64I-NEXT: mv a1, a0
1310-
; RV64I-NEXT: mv a0, s3
1303+
; RV64I-NEXT: mv a0, s2
13111304
; RV64I-NEXT: call __muldf3
13121305
; RV64I-NEXT: mv a1, a0
13131306
; RV64I-NEXT: mv a0, s1
13141307
; RV64I-NEXT: call __subdf3
1315-
; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
1316-
; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
1317-
; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
1318-
; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
1319-
; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
1320-
; RV64I-NEXT: addi sp, sp, 48
1308+
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
1309+
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
1310+
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
1311+
; RV64I-NEXT: ld s2, 0(sp) # 8-byte Folded Reload
1312+
; RV64I-NEXT: addi sp, sp, 32
13211313
; RV64I-NEXT: ret
13221314
%a_ = fadd double 0.0, %a ; avoid negation using xor
13231315
%b_ = fadd double 0.0, %b ; avoid negation using xor

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