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jrbyrnesjrbyrnes
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Remove aggressive reassociation
Change-Id: I72b20a2695eb8de9ac24578729e77c0f3b3cd8aa
1 parent c1d867c commit 8587a7c

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2 files changed

+46
-45
lines changed

2 files changed

+46
-45
lines changed

‎llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp‎

Lines changed: 0 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -3720,30 +3720,6 @@ Value *InstCombinerImpl::reassociateDisjointOr(Value *LHS, Value *RHS) {
37203720
return Builder.CreateOr(Res, X, "", /*IsDisjoint=*/true);
37213721
}
37223722

3723-
Value *X1, *Y1;
3724-
if (match(LHS, m_OneUse(m_DisjointOr(m_Value(X), m_Value(Y)))) &&
3725-
(match(RHS, m_OneUse(m_DisjointOr(m_Value(X1), m_Value(Y1)))))) {
3726-
auto TryFold = [this](Value *Op0, Value *Op1, Value *Rem0,
3727-
Value *Rem1) -> Value * {
3728-
if (Value *Res = foldDisjointOr(Op0, Op1)) {
3729-
auto Disjoint = Builder.CreateOr(Rem0, Rem1, "", /*IsDisjoint=*/true);
3730-
return Builder.CreateOr(Disjoint, Res, "", /*IsDisjoint=*/true);
3731-
}
3732-
return nullptr;
3733-
};
3734-
3735-
if (Value *Res = TryFold(X, X1, Y, Y1))
3736-
return Res;
3737-
3738-
if (Value *Res = TryFold(X, Y1, Y, X1))
3739-
return Res;
3740-
3741-
if (Value *Res = TryFold(Y, X1, X, Y1))
3742-
return Res;
3743-
3744-
if (Value *Res = TryFold(Y, Y1, X, X1))
3745-
return Res;
3746-
}
37473723
return nullptr;
37483724
}
37493725

‎llvm/test/Transforms/InstCombine/or-bitmask.ll‎

Lines changed: 46 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -485,10 +485,13 @@ define i32 @unrelated_ops1(i32 %in, i32 %in2) {
485485

486486
define i32 @unrelated_ops2(i32 %in, i32 %in2, i32 %in3) {
487487
; CHECK-LABEL: @unrelated_ops2(
488-
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 15
488+
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3
489489
; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72
490-
; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2:%.*]]
491-
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP3]], [[TMP2]]
490+
; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[TMP2]], [[IN4:%.*]]
491+
; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 12
492+
; CHECK-NEXT: [[IN2:%.*]] = mul nuw nsw i32 [[AND1]], 72
493+
; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2]]
494+
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[TMP3]]
492495
; CHECK-NEXT: ret i32 [[OUT]]
493496
;
494497
%and0 = and i32 %in, 3
@@ -503,10 +506,14 @@ define i32 @unrelated_ops2(i32 %in, i32 %in2, i32 %in3) {
503506

504507
define i32 @unrelated_ops3(i32 %in, i32 %in2, i32 %in3) {
505508
; CHECK-LABEL: @unrelated_ops3(
506-
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[IN:%.*]], 14
509+
; CHECK-NEXT: [[AND0:%.*]] = and i32 [[IN:%.*]], 2
510+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND0]], 0
511+
; CHECK-NEXT: [[TEMP:%.*]] = select i1 [[CMP]], i32 0, i32 144
512+
; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[TEMP]], [[IN3:%.*]]
513+
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[IN]], 12
507514
; CHECK-NEXT: [[TEMP2:%.*]] = mul nuw nsw i32 [[TMP2]], 72
508-
; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2:%.*]]
509-
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP3]], [[TEMP2]]
515+
; CHECK-NEXT: [[TEMP4:%.*]] = or disjoint i32 [[IN2:%.*]], [[TEMP2]]
516+
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[TEMP4]]
510517
; CHECK-NEXT: ret i32 [[OUT]]
511518
;
512519
%and0 = and i32 %in, 2
@@ -522,10 +529,14 @@ define i32 @unrelated_ops3(i32 %in, i32 %in2, i32 %in3) {
522529

523530
define i32 @unrelated_ops4(i32 %in, i32 %in2, i32 %in3) {
524531
; CHECK-LABEL: @unrelated_ops4(
525-
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[IN:%.*]], 14
532+
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[IN:%.*]], 12
526533
; CHECK-NEXT: [[TMP3:%.*]] = mul nuw nsw i32 [[TMP2]], 72
527-
; CHECK-NEXT: [[TMP4:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2:%.*]]
528-
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP4]], [[TMP3]]
534+
; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[IN4:%.*]], [[TMP3]]
535+
; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 2
536+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND1]], 0
537+
; CHECK-NEXT: [[IN3:%.*]] = select i1 [[CMP]], i32 0, i32 144
538+
; CHECK-NEXT: [[TMP4:%.*]] = or disjoint i32 [[IN3]], [[IN2:%.*]]
539+
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[TMP4]]
529540
; CHECK-NEXT: ret i32 [[OUT]]
530541
;
531542
%and0 = and i32 %in, 12
@@ -541,9 +552,14 @@ define i32 @unrelated_ops4(i32 %in, i32 %in2, i32 %in3) {
541552

542553
define i32 @unrelated_ops5(i32 %in, i32 %in2, i32 %in3) {
543554
; CHECK-LABEL: @unrelated_ops5(
544-
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[IN:%.*]], 6
545-
; CHECK-NEXT: [[TMP3:%.*]] = mul nuw nsw i32 [[TMP2]], 72
546-
; CHECK-NEXT: [[TMP4:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2:%.*]]
555+
; CHECK-NEXT: [[AND0:%.*]] = and i32 [[IN:%.*]], 2
556+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND0]], 0
557+
; CHECK-NEXT: [[IN3:%.*]] = select i1 [[CMP]], i32 0, i32 144
558+
; CHECK-NEXT: [[TMP4:%.*]] = or disjoint i32 [[IN3]], [[IN2:%.*]]
559+
; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 4
560+
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[AND1]], 0
561+
; CHECK-NEXT: [[TEMP2:%.*]] = select i1 [[CMP2]], i32 0, i32 288
562+
; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN4:%.*]], [[TEMP2]]
547563
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP4]], [[TMP3]]
548564
; CHECK-NEXT: ret i32 [[OUT]]
549565
;
@@ -561,10 +577,13 @@ define i32 @unrelated_ops5(i32 %in, i32 %in2, i32 %in3) {
561577

562578
define i32 @unrelated_ops6(i32 %in, i32 %in2, i32 %in3) {
563579
; CHECK-LABEL: @unrelated_ops6(
564-
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 15
580+
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3
565581
; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72
566-
; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2:%.*]]
567-
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP3]], [[TMP2]]
582+
; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[IN4:%.*]], [[TMP2]]
583+
; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 12
584+
; CHECK-NEXT: [[IN2:%.*]] = mul nuw nsw i32 [[AND1]], 72
585+
; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2]]
586+
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[TMP3]]
568587
; CHECK-NEXT: ret i32 [[OUT]]
569588
;
570589
%and0 = and i32 %in, 3
@@ -579,10 +598,13 @@ define i32 @unrelated_ops6(i32 %in, i32 %in2, i32 %in3) {
579598

580599
define i32 @unrelated_ops7(i32 %in, i32 %in2, i32 %in3) {
581600
; CHECK-LABEL: @unrelated_ops7(
582-
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 15
601+
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3
583602
; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72
584-
; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2:%.*]]
585-
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP3]], [[TMP2]]
603+
; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[IN4:%.*]], [[TMP2]]
604+
; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 12
605+
; CHECK-NEXT: [[IN3:%.*]] = mul nuw nsw i32 [[AND1]], 72
606+
; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3]], [[IN2:%.*]]
607+
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[TMP3]]
586608
; CHECK-NEXT: ret i32 [[OUT]]
587609
;
588610
%and0 = and i32 %in, 3
@@ -597,10 +619,13 @@ define i32 @unrelated_ops7(i32 %in, i32 %in2, i32 %in3) {
597619

598620
define i32 @unrelated_ops8(i32 %in, i32 %in2, i32 %in3) {
599621
; CHECK-LABEL: @unrelated_ops8(
600-
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 15
622+
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[IN:%.*]], 3
601623
; CHECK-NEXT: [[TMP2:%.*]] = mul nuw nsw i32 [[TMP1]], 72
602-
; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3:%.*]], [[IN2:%.*]]
603-
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TMP3]], [[TMP2]]
624+
; CHECK-NEXT: [[TEMP3:%.*]] = or disjoint i32 [[TMP2]], [[IN4:%.*]]
625+
; CHECK-NEXT: [[AND1:%.*]] = and i32 [[IN]], 12
626+
; CHECK-NEXT: [[IN3:%.*]] = mul nuw nsw i32 [[AND1]], 72
627+
; CHECK-NEXT: [[TMP3:%.*]] = or disjoint i32 [[IN3]], [[IN2:%.*]]
628+
; CHECK-NEXT: [[OUT:%.*]] = or disjoint i32 [[TEMP3]], [[TMP3]]
604629
; CHECK-NEXT: ret i32 [[OUT]]
605630
;
606631
%and0 = and i32 %in, 3

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