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mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp

Lines changed: 22 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -2532,27 +2532,27 @@ void mlir::populateAMDGPUToROCDLConversionPatterns(LLVMTypeConverter &converter,
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RewritePatternSet &patterns,
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Chipset chipset) {
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populateAMDGPUMemorySpaceAttributeConversions(converter);
2535-
patterns.add<
2536-
FatRawBufferCastLowering,
2537-
RawBufferOpLowering<RawBufferLoadOp, ROCDL::RawPtrBufferLoadOp>,
2538-
RawBufferOpLowering<RawBufferStoreOp, ROCDL::RawPtrBufferStoreOp>,
2539-
RawBufferOpLowering<RawBufferAtomicFaddOp,
2540-
ROCDL::RawPtrBufferAtomicFaddOp>,
2541-
RawBufferOpLowering<RawBufferAtomicFmaxOp,
2542-
ROCDL::RawPtrBufferAtomicFmaxOp>,
2543-
RawBufferOpLowering<RawBufferAtomicSmaxOp,
2544-
ROCDL::RawPtrBufferAtomicSmaxOp>,
2545-
RawBufferOpLowering<RawBufferAtomicUminOp,
2546-
ROCDL::RawPtrBufferAtomicUminOp>,
2547-
RawBufferOpLowering<RawBufferAtomicCmpswapOp,
2548-
ROCDL::RawPtrBufferAtomicCmpSwap>,
2549-
AMDGPUDPPLowering, MemoryCounterWaitOpLowering, LDSBarrierOpLowering,
2550-
SchedBarrierOpLowering, MFMAOpLowering, ScaledMFMAOpLowering,
2551-
WMMAOpLowering, ScaledWMMAOpLowering, ExtPackedFp8OpLowering,
2552-
ScaledExtPackedMatrixOpLowering, ScaledExtPackedOpLowering,
2553-
PackedScaledTruncOpLowering, PackedTrunc2xFp8OpLowering,
2554-
PackedStochRoundFp8OpLowering, GatherToLDSOpLowering,
2555-
TransposeLoadOpLowering, AMDGPUPermlaneLowering,
2556-
AMDGPUMakeDmaBaseLowering>(converter, chipset);
2535+
patterns
2536+
.add<FatRawBufferCastLowering,
2537+
RawBufferOpLowering<RawBufferLoadOp, ROCDL::RawPtrBufferLoadOp>,
2538+
RawBufferOpLowering<RawBufferStoreOp, ROCDL::RawPtrBufferStoreOp>,
2539+
RawBufferOpLowering<RawBufferAtomicFaddOp,
2540+
ROCDL::RawPtrBufferAtomicFaddOp>,
2541+
RawBufferOpLowering<RawBufferAtomicFmaxOp,
2542+
ROCDL::RawPtrBufferAtomicFmaxOp>,
2543+
RawBufferOpLowering<RawBufferAtomicSmaxOp,
2544+
ROCDL::RawPtrBufferAtomicSmaxOp>,
2545+
RawBufferOpLowering<RawBufferAtomicUminOp,
2546+
ROCDL::RawPtrBufferAtomicUminOp>,
2547+
RawBufferOpLowering<RawBufferAtomicCmpswapOp,
2548+
ROCDL::RawPtrBufferAtomicCmpSwap>,
2549+
AMDGPUDPPLowering, MemoryCounterWaitOpLowering, LDSBarrierOpLowering,
2550+
SchedBarrierOpLowering, MFMAOpLowering, ScaledMFMAOpLowering,
2551+
WMMAOpLowering, ScaledWMMAOpLowering, ExtPackedFp8OpLowering,
2552+
ScaledExtPackedMatrixOpLowering, ScaledExtPackedOpLowering,
2553+
PackedScaledTruncOpLowering, PackedTrunc2xFp8OpLowering,
2554+
PackedStochRoundFp8OpLowering, GatherToLDSOpLowering,
2555+
TransposeLoadOpLowering, AMDGPUPermlaneLowering,
2556+
AMDGPUMakeDmaBaseLowering>(converter, chipset);
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patterns.add<AMDGPUSwizzleBitModeLowering>(converter);
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}

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