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1 parent 44f5809 commit 9453b78Copy full SHA for 9453b78
llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -895,10 +895,10 @@ bool RISCVRegisterInfo::getRegAllocationHints(
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// Check if this register matches the even/odd requirement
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bool IsOdd = (RegNum % 2 != 0);
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- // Skip unallocatable registers.
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- if (MRI->isReserved(PhysReg))
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- continue;
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// Verify the pair register exists and is in the same register class
+ // TODO: Skip unallocatable registers: we need to prevent any of odd/even
+ // to be reserved, so if we need odd, we need to check if corresponding
+ // even is preserved, vice versa.
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if ((WantOdd && IsOdd) || (!WantOdd && !IsOdd))
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Hints.push_back(PhysReg);
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}
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