Add common CHECK prefix

Author: phoebewang

llvm/test/CodeGen/X86/apx/no-rex2-general.ll

@@ -1,27 +1,17 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+ssse3,+egpr  | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+ssse3,+egpr,+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+ssse3,+egpr  | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+ssse3,+egpr,+avx | FileCheck %s --check-prefixes=CHECK,AVX
 
 define i32 @map0(ptr nocapture noundef readonly %a, i64 noundef %b) {
-; SSE-LABEL: map0:
-; SSE:       # %bb.0: # %entry
-; SSE-NEXT:    movq %rsi, %r16
-; SSE-NEXT:    movq %rdi, %r17
-; SSE-NEXT:    #APP
-; SSE-NEXT:    nop
-; SSE-NEXT:    #NO_APP
-; SSE-NEXT:    movl (%r17,%r16,4), %eax
-; SSE-NEXT:    retq
-;
-; AVX-LABEL: map0:
-; AVX:       # %bb.0: # %entry
-; AVX-NEXT:    movq %rsi, %r16
-; AVX-NEXT:    movq %rdi, %r17
-; AVX-NEXT:    #APP
-; AVX-NEXT:    nop
-; AVX-NEXT:    #NO_APP
-; AVX-NEXT:    movl (%r17,%r16,4), %eax
-; AVX-NEXT:    retq
+; CHECK-LABEL: map0:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    movq %rsi, %r16
+; CHECK-NEXT:    movq %rdi, %r17
+; CHECK-NEXT:    #APP
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    #NO_APP
+; CHECK-NEXT:    movl (%r17,%r16,4), %eax
+; CHECK-NEXT:    retq
 entry:
   %add.ptr = getelementptr inbounds i32, ptr %a, i64 %b
   tail call void asm sideeffect "nop", "~{eax},~{ecx},~{edx},~{esi},~{edi},~{r8},~{r9},~{r10},~{r11}"()