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paulwalker-armpaulwalker-arm
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Fix whitespace formating within unit tests.
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‎llvm/test/CodeGen/AArch64/sve-select.ll‎

Lines changed: 81 additions & 81 deletions
Original file line numberDiff line numberDiff line change
@@ -1,259 +1,259 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -verify-machineinstrs < %s | FileCheck %s
33

4-
define <vscale x 1 x i8> @select_nxv1i8(i1 %cond, <vscale x 1 x i8> %a, <vscale x 1 x i8> %b) {
4+
define <vscale x 1 x i8> @select_nxv1i8(i1 %cond, <vscale x 1 x i8> %a, <vscale x 1 x i8> %b) {
55
; CHECK-LABEL: select_nxv1i8:
66
; CHECK: // %bb.0:
77
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
88
; CHECK-NEXT: sbfx x8, x0, #0, #1
99
; CHECK-NEXT: whilelo p0.b, xzr, x8
1010
; CHECK-NEXT: sel z0.b, p0, z0.b, z1.b
1111
; CHECK-NEXT: ret
12-
%res = select i1 %cond, <vscale x 1 x i8> %a, <vscale x 1 x i8> %b
13-
ret <vscale x 1 x i8> %res
12+
%res = select i1 %cond, <vscale x 1 x i8> %a, <vscale x 1 x i8> %b
13+
ret <vscale x 1 x i8> %res
1414
}
1515

16-
define <vscale x 16 x i8> @select_nxv16i8(i1 %cond, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {
16+
define <vscale x 16 x i8> @select_nxv16i8(i1 %cond, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b) {
1717
; CHECK-LABEL: select_nxv16i8:
1818
; CHECK: // %bb.0:
1919
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
2020
; CHECK-NEXT: sbfx x8, x0, #0, #1
2121
; CHECK-NEXT: whilelo p0.b, xzr, x8
2222
; CHECK-NEXT: sel z0.b, p0, z0.b, z1.b
2323
; CHECK-NEXT: ret
24-
%res = select i1 %cond, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b
25-
ret <vscale x 16 x i8> %res
24+
%res = select i1 %cond, <vscale x 16 x i8> %a, <vscale x 16 x i8> %b
25+
ret <vscale x 16 x i8> %res
2626
}
2727

28-
define <vscale x 1 x i16> @select_nxv1i16(i1 %cond, <vscale x 1 x i16> %a, <vscale x 1 x i16> %b) {
28+
define <vscale x 1 x i16> @select_nxv1i16(i1 %cond, <vscale x 1 x i16> %a, <vscale x 1 x i16> %b) {
2929
; CHECK-LABEL: select_nxv1i16:
3030
; CHECK: // %bb.0:
3131
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
3232
; CHECK-NEXT: sbfx x8, x0, #0, #1
3333
; CHECK-NEXT: whilelo p0.h, xzr, x8
3434
; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h
3535
; CHECK-NEXT: ret
36-
%res = select i1 %cond, <vscale x 1 x i16> %a, <vscale x 1 x i16> %b
37-
ret <vscale x 1 x i16> %res
36+
%res = select i1 %cond, <vscale x 1 x i16> %a, <vscale x 1 x i16> %b
37+
ret <vscale x 1 x i16> %res
3838
}
3939

40-
define <vscale x 8 x i16> @select_nxv8i16(i1 %cond, <vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
40+
define <vscale x 8 x i16> @select_nxv8i16(i1 %cond, <vscale x 8 x i16> %a, <vscale x 8 x i16> %b) {
4141
; CHECK-LABEL: select_nxv8i16:
4242
; CHECK: // %bb.0:
4343
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
4444
; CHECK-NEXT: sbfx x8, x0, #0, #1
4545
; CHECK-NEXT: whilelo p0.h, xzr, x8
4646
; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h
4747
; CHECK-NEXT: ret
48-
%res = select i1 %cond, <vscale x 8 x i16> %a, <vscale x 8 x i16> %b
49-
ret <vscale x 8 x i16> %res
48+
%res = select i1 %cond, <vscale x 8 x i16> %a, <vscale x 8 x i16> %b
49+
ret <vscale x 8 x i16> %res
5050
}
5151

52-
define <vscale x 1 x i32> @select_nxv1i32(i1 %cond, <vscale x 1 x i32> %a, <vscale x 1 x i32> %b) {
52+
define <vscale x 1 x i32> @select_nxv1i32(i1 %cond, <vscale x 1 x i32> %a, <vscale x 1 x i32> %b) {
5353
; CHECK-LABEL: select_nxv1i32:
5454
; CHECK: // %bb.0:
5555
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
5656
; CHECK-NEXT: sbfx x8, x0, #0, #1
5757
; CHECK-NEXT: whilelo p0.s, xzr, x8
5858
; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s
5959
; CHECK-NEXT: ret
60-
%res = select i1 %cond, <vscale x 1 x i32> %a, <vscale x 1 x i32> %b
61-
ret <vscale x 1 x i32> %res
60+
%res = select i1 %cond, <vscale x 1 x i32> %a, <vscale x 1 x i32> %b
61+
ret <vscale x 1 x i32> %res
6262
}
6363

64-
define <vscale x 4 x i32> @select_nxv4i32(i1 %cond, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
64+
define <vscale x 4 x i32> @select_nxv4i32(i1 %cond, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
6565
; CHECK-LABEL: select_nxv4i32:
6666
; CHECK: // %bb.0:
6767
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
6868
; CHECK-NEXT: sbfx x8, x0, #0, #1
6969
; CHECK-NEXT: whilelo p0.s, xzr, x8
7070
; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s
7171
; CHECK-NEXT: ret
72-
%res = select i1 %cond, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b
73-
ret <vscale x 4 x i32> %res
72+
%res = select i1 %cond, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b
73+
ret <vscale x 4 x i32> %res
7474
}
7575

76-
define <vscale x 1 x i64> @select_nxv1i64(i1 %cond, <vscale x 1 x i64> %a, <vscale x 1 x i64> %b) {
76+
define <vscale x 1 x i64> @select_nxv1i64(i1 %cond, <vscale x 1 x i64> %a, <vscale x 1 x i64> %b) {
7777
; CHECK-LABEL: select_nxv1i64:
7878
; CHECK: // %bb.0:
7979
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
8080
; CHECK-NEXT: sbfx x8, x0, #0, #1
8181
; CHECK-NEXT: whilelo p0.d, xzr, x8
8282
; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d
8383
; CHECK-NEXT: ret
84-
%res = select i1 %cond, <vscale x 1 x i64> %a, <vscale x 1 x i64> %b
85-
ret <vscale x 1 x i64> %res
84+
%res = select i1 %cond, <vscale x 1 x i64> %a, <vscale x 1 x i64> %b
85+
ret <vscale x 1 x i64> %res
8686
}
8787

88-
define <vscale x 2 x i64> @select_nxv2i64(i1 %cond, <vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
88+
define <vscale x 2 x i64> @select_nxv2i64(i1 %cond, <vscale x 2 x i64> %a, <vscale x 2 x i64> %b) {
8989
; CHECK-LABEL: select_nxv2i64:
9090
; CHECK: // %bb.0:
9191
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
9292
; CHECK-NEXT: sbfx x8, x0, #0, #1
9393
; CHECK-NEXT: whilelo p0.d, xzr, x8
9494
; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d
9595
; CHECK-NEXT: ret
96-
%res = select i1 %cond, <vscale x 2 x i64> %a, <vscale x 2 x i64> %b
97-
ret <vscale x 2 x i64> %res
96+
%res = select i1 %cond, <vscale x 2 x i64> %a, <vscale x 2 x i64> %b
97+
ret <vscale x 2 x i64> %res
9898
}
9999

100-
define <vscale x 8 x half> @select_nxv8f16(i1 %cond, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
100+
define <vscale x 8 x half> @select_nxv8f16(i1 %cond, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
101101
; CHECK-LABEL: select_nxv8f16:
102102
; CHECK: // %bb.0:
103103
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
104104
; CHECK-NEXT: sbfx x8, x0, #0, #1
105105
; CHECK-NEXT: whilelo p0.h, xzr, x8
106106
; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h
107107
; CHECK-NEXT: ret
108-
%res = select i1 %cond, <vscale x 8 x half> %a, <vscale x 8 x half> %b
109-
ret <vscale x 8 x half> %res
108+
%res = select i1 %cond, <vscale x 8 x half> %a, <vscale x 8 x half> %b
109+
ret <vscale x 8 x half> %res
110110
}
111111

112-
define <vscale x 4 x half> @select_nxv4f16(i1 %cond, <vscale x 4 x half> %a, <vscale x 4 x half> %b) {
112+
define <vscale x 4 x half> @select_nxv4f16(i1 %cond, <vscale x 4 x half> %a, <vscale x 4 x half> %b) {
113113
; CHECK-LABEL: select_nxv4f16:
114114
; CHECK: // %bb.0:
115115
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
116116
; CHECK-NEXT: sbfx x8, x0, #0, #1
117117
; CHECK-NEXT: whilelo p0.s, xzr, x8
118118
; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s
119119
; CHECK-NEXT: ret
120-
%res = select i1 %cond, <vscale x 4 x half> %a, <vscale x 4 x half> %b
121-
ret <vscale x 4 x half> %res
120+
%res = select i1 %cond, <vscale x 4 x half> %a, <vscale x 4 x half> %b
121+
ret <vscale x 4 x half> %res
122122
}
123123

124-
define <vscale x 2 x half> @select_nxv2f16(i1 %cond, <vscale x 2 x half> %a, <vscale x 2 x half> %b) {
124+
define <vscale x 2 x half> @select_nxv2f16(i1 %cond, <vscale x 2 x half> %a, <vscale x 2 x half> %b) {
125125
; CHECK-LABEL: select_nxv2f16:
126126
; CHECK: // %bb.0:
127127
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
128128
; CHECK-NEXT: sbfx x8, x0, #0, #1
129129
; CHECK-NEXT: whilelo p0.d, xzr, x8
130130
; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d
131131
; CHECK-NEXT: ret
132-
%res = select i1 %cond, <vscale x 2 x half> %a, <vscale x 2 x half> %b
133-
ret <vscale x 2 x half> %res
132+
%res = select i1 %cond, <vscale x 2 x half> %a, <vscale x 2 x half> %b
133+
ret <vscale x 2 x half> %res
134134
}
135135

136-
define <vscale x 4 x float> @select_nxv4f32(i1 %cond, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
136+
define <vscale x 4 x float> @select_nxv4f32(i1 %cond, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
137137
; CHECK-LABEL: select_nxv4f32:
138138
; CHECK: // %bb.0:
139139
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
140140
; CHECK-NEXT: sbfx x8, x0, #0, #1
141141
; CHECK-NEXT: whilelo p0.s, xzr, x8
142142
; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s
143143
; CHECK-NEXT: ret
144-
%res = select i1 %cond, <vscale x 4 x float> %a, <vscale x 4 x float> %b
145-
ret <vscale x 4 x float> %res
144+
%res = select i1 %cond, <vscale x 4 x float> %a, <vscale x 4 x float> %b
145+
ret <vscale x 4 x float> %res
146146
}
147147

148-
define <vscale x 2 x float> @select_nxv2f32(i1 %cond, <vscale x 2 x float> %a, <vscale x 2 x float> %b) {
148+
define <vscale x 2 x float> @select_nxv2f32(i1 %cond, <vscale x 2 x float> %a, <vscale x 2 x float> %b) {
149149
; CHECK-LABEL: select_nxv2f32:
150150
; CHECK: // %bb.0:
151151
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
152152
; CHECK-NEXT: sbfx x8, x0, #0, #1
153153
; CHECK-NEXT: whilelo p0.d, xzr, x8
154154
; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d
155155
; CHECK-NEXT: ret
156-
%res = select i1 %cond, <vscale x 2 x float> %a, <vscale x 2 x float> %b
157-
ret <vscale x 2 x float> %res
156+
%res = select i1 %cond, <vscale x 2 x float> %a, <vscale x 2 x float> %b
157+
ret <vscale x 2 x float> %res
158158
}
159159

160-
define <vscale x 2 x double> @select_nxv2f64(i1 %cond, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {
160+
define <vscale x 2 x double> @select_nxv2f64(i1 %cond, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {
161161
; CHECK-LABEL: select_nxv2f64:
162162
; CHECK: // %bb.0:
163163
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
164164
; CHECK-NEXT: sbfx x8, x0, #0, #1
165165
; CHECK-NEXT: whilelo p0.d, xzr, x8
166166
; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d
167167
; CHECK-NEXT: ret
168-
%res = select i1 %cond, <vscale x 2 x double> %a, <vscale x 2 x double> %b
169-
ret <vscale x 2 x double> %res
168+
%res = select i1 %cond, <vscale x 2 x double> %a, <vscale x 2 x double> %b
169+
ret <vscale x 2 x double> %res
170170
}
171171

172-
define <vscale x 8 x bfloat> @select_nxv8bf16(i1 %cond, <vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b) {
172+
define <vscale x 8 x bfloat> @select_nxv8bf16(i1 %cond, <vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b) {
173173
; CHECK-LABEL: select_nxv8bf16:
174174
; CHECK: // %bb.0:
175175
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
176176
; CHECK-NEXT: sbfx x8, x0, #0, #1
177177
; CHECK-NEXT: whilelo p0.h, xzr, x8
178178
; CHECK-NEXT: sel z0.h, p0, z0.h, z1.h
179179
; CHECK-NEXT: ret
180-
%res = select i1 %cond, <vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b
181-
ret <vscale x 8 x bfloat> %res
180+
%res = select i1 %cond, <vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b
181+
ret <vscale x 8 x bfloat> %res
182182
}
183183

184-
define <vscale x 4 x bfloat> @select_nxv4bf16(i1 %cond, <vscale x 4 x bfloat> %a, <vscale x 4 x bfloat> %b) {
184+
define <vscale x 4 x bfloat> @select_nxv4bf16(i1 %cond, <vscale x 4 x bfloat> %a, <vscale x 4 x bfloat> %b) {
185185
; CHECK-LABEL: select_nxv4bf16:
186186
; CHECK: // %bb.0:
187187
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
188188
; CHECK-NEXT: sbfx x8, x0, #0, #1
189189
; CHECK-NEXT: whilelo p0.s, xzr, x8
190190
; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s
191191
; CHECK-NEXT: ret
192-
%res = select i1 %cond, <vscale x 4 x bfloat> %a, <vscale x 4 x bfloat> %b
193-
ret <vscale x 4 x bfloat> %res
192+
%res = select i1 %cond, <vscale x 4 x bfloat> %a, <vscale x 4 x bfloat> %b
193+
ret <vscale x 4 x bfloat> %res
194194
}
195195

196-
define <vscale x 2 x bfloat> @select_nxv2bf16(i1 %cond, <vscale x 2 x bfloat> %a, <vscale x 2 x bfloat> %b) {
196+
define <vscale x 2 x bfloat> @select_nxv2bf16(i1 %cond, <vscale x 2 x bfloat> %a, <vscale x 2 x bfloat> %b) {
197197
; CHECK-LABEL: select_nxv2bf16:
198198
; CHECK: // %bb.0:
199199
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
200200
; CHECK-NEXT: sbfx x8, x0, #0, #1
201201
; CHECK-NEXT: whilelo p0.d, xzr, x8
202202
; CHECK-NEXT: sel z0.d, p0, z0.d, z1.d
203203
; CHECK-NEXT: ret
204-
%res = select i1 %cond, <vscale x 2 x bfloat> %a, <vscale x 2 x bfloat> %b
205-
ret <vscale x 2 x bfloat> %res
204+
%res = select i1 %cond, <vscale x 2 x bfloat> %a, <vscale x 2 x bfloat> %b
205+
ret <vscale x 2 x bfloat> %res
206206
}
207207

208-
define <vscale x 16 x i1> @select_nxv16i1(i1 %cond, <vscale x 16 x i1> %a, <vscale x 16 x i1> %b) {
208+
define <vscale x 16 x i1> @select_nxv16i1(i1 %cond, <vscale x 16 x i1> %a, <vscale x 16 x i1> %b) {
209209
; CHECK-LABEL: select_nxv16i1:
210210
; CHECK: // %bb.0:
211211
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
212212
; CHECK-NEXT: sbfx x8, x0, #0, #1
213213
; CHECK-NEXT: whilelo p2.b, xzr, x8
214214
; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b
215215
; CHECK-NEXT: ret
216-
%res = select i1 %cond, <vscale x 16 x i1> %a, <vscale x 16 x i1> %b
217-
ret <vscale x 16 x i1> %res
216+
%res = select i1 %cond, <vscale x 16 x i1> %a, <vscale x 16 x i1> %b
217+
ret <vscale x 16 x i1> %res
218218
}
219219

220-
define <vscale x 8 x i1> @select_nxv8i1(i1 %cond, <vscale x 8 x i1> %a, <vscale x 8 x i1> %b) {
220+
define <vscale x 8 x i1> @select_nxv8i1(i1 %cond, <vscale x 8 x i1> %a, <vscale x 8 x i1> %b) {
221221
; CHECK-LABEL: select_nxv8i1:
222222
; CHECK: // %bb.0:
223223
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
224224
; CHECK-NEXT: sbfx x8, x0, #0, #1
225225
; CHECK-NEXT: whilelo p2.h, xzr, x8
226226
; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b
227227
; CHECK-NEXT: ret
228-
%res = select i1 %cond, <vscale x 8 x i1> %a, <vscale x 8 x i1> %b
229-
ret <vscale x 8 x i1> %res
228+
%res = select i1 %cond, <vscale x 8 x i1> %a, <vscale x 8 x i1> %b
229+
ret <vscale x 8 x i1> %res
230230
}
231231

232-
define <vscale x 4 x i1> @select_nxv4i1(i1 %cond, <vscale x 4 x i1> %a, <vscale x 4 x i1> %b) {
232+
define <vscale x 4 x i1> @select_nxv4i1(i1 %cond, <vscale x 4 x i1> %a, <vscale x 4 x i1> %b) {
233233
; CHECK-LABEL: select_nxv4i1:
234234
; CHECK: // %bb.0:
235235
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
236236
; CHECK-NEXT: sbfx x8, x0, #0, #1
237237
; CHECK-NEXT: whilelo p2.s, xzr, x8
238238
; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b
239239
; CHECK-NEXT: ret
240-
%res = select i1 %cond, <vscale x 4 x i1> %a, <vscale x 4 x i1> %b
241-
ret <vscale x 4 x i1> %res
240+
%res = select i1 %cond, <vscale x 4 x i1> %a, <vscale x 4 x i1> %b
241+
ret <vscale x 4 x i1> %res
242242
}
243243

244-
define <vscale x 2 x i1> @select_nxv2i1(i1 %cond, <vscale x 2 x i1> %a, <vscale x 2 x i1> %b) {
244+
define <vscale x 2 x i1> @select_nxv2i1(i1 %cond, <vscale x 2 x i1> %a, <vscale x 2 x i1> %b) {
245245
; CHECK-LABEL: select_nxv2i1:
246246
; CHECK: // %bb.0:
247247
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
248248
; CHECK-NEXT: sbfx x8, x0, #0, #1
249249
; CHECK-NEXT: whilelo p2.d, xzr, x8
250250
; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b
251251
; CHECK-NEXT: ret
252-
%res = select i1 %cond, <vscale x 2 x i1> %a, <vscale x 2 x i1> %b
253-
ret <vscale x 2 x i1> %res
252+
%res = select i1 %cond, <vscale x 2 x i1> %a, <vscale x 2 x i1> %b
253+
ret <vscale x 2 x i1> %res
254254
}
255255

256-
define <vscale x 1 x i1> @select_nxv1i1(i1 %cond, <vscale x 1 x i1> %a, <vscale x 1 x i1> %b) {
256+
define <vscale x 1 x i1> @select_nxv1i1(i1 %cond, <vscale x 1 x i1> %a, <vscale x 1 x i1> %b) {
257257
; CHECK-LABEL: select_nxv1i1:
258258
; CHECK: // %bb.0:
259259
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
@@ -262,8 +262,8 @@ define <vscale x 1 x i1> @select_nxv1i1(i1 %cond, <vscale x 1 x i1> %a, <vscal
262262
; CHECK-NEXT: punpklo p2.h, p2.b
263263
; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b
264264
; CHECK-NEXT: ret
265-
%res = select i1 %cond, <vscale x 1 x i1> %a, <vscale x 1 x i1> %b
266-
ret <vscale x 1 x i1> %res
265+
%res = select i1 %cond, <vscale x 1 x i1> %a, <vscale x 1 x i1> %b
266+
ret <vscale x 1 x i1> %res
267267
}
268268

269269
; Integer vector select
@@ -602,9 +602,9 @@ define <vscale x 1 x i1> @icmp_select_nxv1i1(<vscale x 1 x i1> %a, <vscale x 1 x
602602
; CHECK-NEXT: punpklo p2.h, p2.b
603603
; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b
604604
; CHECK-NEXT: ret
605-
%mask = icmp eq i64 %x0, 0
606-
%sel = select i1 %mask, <vscale x 1 x i1> %a, <vscale x 1 x i1> %b
607-
ret <vscale x 1 x i1> %sel
605+
%mask = icmp eq i64 %x0, 0
606+
%sel = select i1 %mask, <vscale x 1 x i1> %a, <vscale x 1 x i1> %b
607+
ret <vscale x 1 x i1> %sel
608608
}
609609

610610
define <vscale x 2 x i1> @icmp_select_nxv2i1(<vscale x 2 x i1> %a, <vscale x 2 x i1> %b, i64 %x0) {
@@ -616,9 +616,9 @@ define <vscale x 2 x i1> @icmp_select_nxv2i1(<vscale x 2 x i1> %a, <vscale x 2 x
616616
; CHECK-NEXT: whilelo p2.d, xzr, x8
617617
; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b
618618
; CHECK-NEXT: ret
619-
%mask = icmp eq i64 %x0, 0
620-
%sel = select i1 %mask, <vscale x 2 x i1> %a, <vscale x 2 x i1> %b
621-
ret <vscale x 2 x i1> %sel
619+
%mask = icmp eq i64 %x0, 0
620+
%sel = select i1 %mask, <vscale x 2 x i1> %a, <vscale x 2 x i1> %b
621+
ret <vscale x 2 x i1> %sel
622622
}
623623
define <vscale x 4 x i1> @icmp_select_nxv4i1(<vscale x 4 x i1> %a, <vscale x 4 x i1> %b, i64 %x0) {
624624
; CHECK-LABEL: icmp_select_nxv4i1:
@@ -629,9 +629,9 @@ define <vscale x 4 x i1> @icmp_select_nxv4i1(<vscale x 4 x i1> %a, <vscale x 4 x
629629
; CHECK-NEXT: whilelo p2.s, xzr, x8
630630
; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b
631631
; CHECK-NEXT: ret
632-
%mask = icmp eq i64 %x0, 0
633-
%sel = select i1 %mask, <vscale x 4 x i1> %a, <vscale x 4 x i1> %b
634-
ret <vscale x 4 x i1> %sel
632+
%mask = icmp eq i64 %x0, 0
633+
%sel = select i1 %mask, <vscale x 4 x i1> %a, <vscale x 4 x i1> %b
634+
ret <vscale x 4 x i1> %sel
635635
}
636636
define <vscale x 8 x i1> @icmp_select_nxv8i1(<vscale x 8 x i1> %a, <vscale x 8 x i1> %b, i64 %x0) {
637637
; CHECK-LABEL: icmp_select_nxv8i1:
@@ -642,9 +642,9 @@ define <vscale x 8 x i1> @icmp_select_nxv8i1(<vscale x 8 x i1> %a, <vscale x 8 x
642642
; CHECK-NEXT: whilelo p2.h, xzr, x8
643643
; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b
644644
; CHECK-NEXT: ret
645-
%mask = icmp eq i64 %x0, 0
646-
%sel = select i1 %mask, <vscale x 8 x i1> %a, <vscale x 8 x i1> %b
647-
ret <vscale x 8 x i1> %sel
645+
%mask = icmp eq i64 %x0, 0
646+
%sel = select i1 %mask, <vscale x 8 x i1> %a, <vscale x 8 x i1> %b
647+
ret <vscale x 8 x i1> %sel
648648
}
649649
define <vscale x 16 x i1> @icmp_select_nxv16i1(<vscale x 16 x i1> %a, <vscale x 16 x i1> %b, i64 %x0) {
650650
; CHECK-LABEL: icmp_select_nxv16i1:
@@ -655,9 +655,9 @@ define <vscale x 16 x i1> @icmp_select_nxv16i1(<vscale x 16 x i1> %a, <vscale x
655655
; CHECK-NEXT: whilelo p2.b, xzr, x8
656656
; CHECK-NEXT: sel p0.b, p2, p0.b, p1.b
657657
; CHECK-NEXT: ret
658-
%mask = icmp eq i64 %x0, 0
659-
%sel = select i1 %mask, <vscale x 16 x i1> %a, <vscale x 16 x i1> %b
660-
ret <vscale x 16 x i1> %sel
658+
%mask = icmp eq i64 %x0, 0
659+
%sel = select i1 %mask, <vscale x 16 x i1> %a, <vscale x 16 x i1> %b
660+
ret <vscale x 16 x i1> %sel
661661
}
662662

663663
define <vscale x 4 x float> @select_f32_invert_fmul(<vscale x 4 x float> %a, <vscale x 4 x float> %b) #0 {

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