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update tests
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11 files changed

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-222
lines changed

11 files changed

+41
-222
lines changed

‎llvm/test/CodeGen/AArch64/arm64-vector-ext.ll‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@ define void @func30(%T0_30 %v0, ptr %p1) {
2020
define <1 x i32> @autogen_SD7918() {
2121
; CHECK-LABEL: autogen_SD7918
2222
; CHECK: movi.2d v0, #0000000000000000
23+
; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
2324
; CHECK-NEXT: ret
2425
%I29 = insertelement <1 x i1> zeroinitializer, i1 false, i32 0
2526
%ZE = zext <1 x i1> %I29 to <1 x i32>

‎llvm/test/CodeGen/AArch64/arm64-vshuffle.ll‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@ define <8 x i1> @test1() {
44
; CHECK-LABEL: test1:
55
; CHECK: ; %bb.0: ; %entry
66
; CHECK-NEXT: movi.16b v0, #0
7+
; CHECK-NEXT: ; kill: def $d0 killed $d0 killed $q0
78
; CHECK-NEXT: ret
89
entry:
910
%Shuff = shufflevector <8 x i1> <i1 0, i1 1, i1 2, i1 3, i1 4, i1 5, i1 6,

‎llvm/test/CodeGen/AVR/calling-conv/c/return_aggr.ll‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6,9 +6,9 @@ start:
66
; for some reason the i16 is loaded to r24:r25
77
; and then moved to r23:r24
88
; CHECK: ldi r22, 64
9-
; CHECK-NEXT: r23,
10-
; CHECK-NEXT: r24,
11-
; CHECK-NEXT: r25, 11
9+
; CHECK-NEXT: ldi r18, 0
10+
; CHECK-NEXT: ldi r19, 4
11+
; CHECK-NEXT: ldi r25, 11
1212
%0 = insertvalue {i8, i16, i8} undef, i8 64, 0
1313
%1 = insertvalue {i8, i16, i8} %0, i16 1024, 1
1414
%2 = insertvalue {i8, i16, i8} %1, i8 11, 2

‎llvm/test/CodeGen/BPF/BTF/filename.ll‎

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -47,8 +47,8 @@ define dso_local i32 @test() local_unnamed_addr #0 !dbg !7 {
4747
; CHECK-NEXT: .long 0
4848
; CHECK-NEXT: .long 20
4949
; CHECK-NEXT: .long 20
50-
; CHECK-NEXT: .long 28
51-
; CHECK-NEXT: .long 48
50+
; CHECK-NEXT: .long 44
51+
; CHECK-NEXT: .long 64
5252
; CHECK-NEXT: .long 0
5353
; CHECK-NEXT: .long 8 # FuncInfo
5454
; CHECK-NEXT: .long 10 # FuncInfo section string offset=10
@@ -57,7 +57,11 @@ define dso_local i32 @test() local_unnamed_addr #0 !dbg !7 {
5757
; CHECK-NEXT: .long 3
5858
; CHECK-NEXT: .long 16 # LineInfo
5959
; CHECK-NEXT: .long 10 # LineInfo section string offset=10
60-
; CHECK-NEXT: .long 1
60+
; CHECK-NEXT: .long 2
61+
; CHECK-NEXT: .long .Lfunc_begin{{[0-9]+}}
62+
; CHECK-NEXT: .long 16
63+
; CHECK-NEXT: .long 0
64+
; CHECK-NEXT: .long 1024 # Line 1 Col 0
6165
; CHECK-NEXT: .long .Ltmp{{[0-9]+}}
6266
; CHECK-NEXT: .long 16
6367
; CHECK-NEXT: .long 0

‎llvm/test/CodeGen/BPF/BTF/func-unused-arg.ll‎

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -52,8 +52,8 @@ define dso_local i32 @f1(i32) local_unnamed_addr #0 !dbg !7 {
5252
; CHECK-NEXT: .long 0
5353
; CHECK-NEXT: .long 20
5454
; CHECK-NEXT: .long 20
55-
; CHECK-NEXT: .long 28
56-
; CHECK-NEXT: .long 48
55+
; CHECK-NEXT: .long 44
56+
; CHECK-NEXT: .long 64
5757
; CHECK-NEXT: .long 0
5858
; CHECK-NEXT: .long 8 # FuncInfo
5959
; CHECK-NEXT: .long 11 # FuncInfo section string offset=11
@@ -62,7 +62,11 @@ define dso_local i32 @f1(i32) local_unnamed_addr #0 !dbg !7 {
6262
; CHECK-NEXT: .long 3
6363
; CHECK-NEXT: .long 16 # LineInfo
6464
; CHECK-NEXT: .long 11 # LineInfo section string offset=11
65-
; CHECK-NEXT: .long 1
65+
; CHECK-NEXT: .long 2
66+
; CHECK-NEXT: .long .Lfunc_begin0
67+
; CHECK-NEXT: .long 17
68+
; CHECK-NEXT: .long 0
69+
; CHECK-NEXT: .long 1024 # Line 1 Col 0
6670
; CHECK-NEXT: .long .Ltmp{{[0-9]+}}
6771
; CHECK-NEXT: .long 17
6872
; CHECK-NEXT: .long 0

‎llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-4.ll‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,12 @@ entry:
2727
}
2828

2929
; CHECK: r0 = 1
30-
; CHECK-NEXT: exit
30+
; CHECK-NEXT: # kill: def $w0 killed $w0 killed $r0
31+
; CHECK-NEXT: .Ltmp1:
32+
; CHECK-NEXT: .loc 1 6 3 prologue_end # test.c:6:3
33+
; CHECK-NEXT: .Ltmp2:
34+
; CHECK-NEXT: .Ltmp3:
35+
; CHECK-NEXT: exit
3136

3237
; CHECK: .long 26 # BTF_KIND_STRUCT(id = 4)
3338
; CHECK-NEXT: .long 67108865 # 0x4000001

‎llvm/test/CodeGen/BPF/disassemble-mcpu-v3.s‎

Lines changed: 0 additions & 18 deletions
This file was deleted.

‎llvm/test/CodeGen/BPF/fi_ri.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -5,10 +5,10 @@
55
; Function Attrs: nounwind uwtable
66
define i32 @test() #0 {
77
%key = alloca %struct.key_t, align 4
8-
; CHECK: r1 = 0
9-
; CHECK: *(u32 *)(r10 - 8) = r1
10-
; CHECK: *(u64 *)(r10 - 16) = r1
11-
; CHECK: *(u64 *)(r10 - 24) = r1
8+
; CHECK: r6 = 0
9+
; CHECK: *(u32 *)(r10 - 8) = r6
10+
; CHECK: *(u64 *)(r10 - 16) = r6
11+
; CHECK: *(u64 *)(r10 - 24) = r6
1212
call void @llvm.memset.p0.i64(ptr align 4 %key, i8 0, i64 20, i1 false)
1313
; CHECK: r1 = r10
1414
; CHECK: r1 += -20

‎llvm/test/CodeGen/BPF/rodata_1.ll‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -35,13 +35,13 @@ define i32 @test() local_unnamed_addr #0 {
3535
entry:
3636
tail call void @llvm.memcpy.p0.p0.i64(ptr @g1, ptr @test.t1, i64 3, i1 false)
3737
tail call void @llvm.memcpy.p0.p0.i64(ptr align 4 @g2, ptr align 4 @test.t2, i64 20, i1 false)
38-
; CHECK: r1 = g1
39-
; CHECK: r2 = 0
40-
; CHECK: *(u8 *)(r1 + 1) = r2
41-
; CHECK: r3 = 1
42-
; CHECK: *(u8 *)(r1 + 2) = r3
43-
; CHECK: r1 = g2
44-
; CHECK: *(u32 *)(r1 + 8) = r3
38+
; CHECK: r1 = g1 ll
39+
; CHECK: r0 = 0
40+
; CHECK: *(u8 *)(r1 + 1) = r0
41+
; CHECK: r2 = 1
42+
; CHECK: *(u8 *)(r1 + 2) = r2
43+
; CHECK: r1 = g2 ll
44+
; CHECK: *(u32 *)(r1 + 8) = r2
4545
ret i32 0
4646
}
4747
; CHECK: .section .rodata,"a",@progbits

‎llvm/test/CodeGen/BPF/rodata_2.ll‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -39,11 +39,11 @@ entry:
3939
; CHECK: *(u32 *)(r1 + 20) = r2
4040
; CHECK: r2 = 1
4141
; CHECK: *(u32 *)(r1 + 16) = r2
42-
; CHECK: r2 = 0
43-
; CHECK: *(u32 *)(r1 + 28) = r2
44-
; CHECK: *(u32 *)(r1 + 8) = r2
45-
; CHECK: *(u32 *)(r1 + 4) = r2
46-
; CHECK: *(u32 *)(r1 + 0) = r2
42+
; CHECK: r0 = 0
43+
; CHECK: *(u32 *)(r1 + 28) = r0
44+
; CHECK: *(u32 *)(r1 + 8) = r0
45+
; CHECK: *(u32 *)(r1 + 4) = r0
46+
; CHECK: *(u32 *)(r1 + 0) = r0
4747
ret i32 0
4848
}
4949
; CHECK: .section .rodata.cst32,"aM",@progbits,32

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