@@ -184,26 +184,17 @@ bool SPIRVInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
184184 MachineBasicBlock *&FBB,
185185 SmallVectorImpl<MachineOperand> &Cond,
186186 bool AllowModify) const {
187- TBB = nullptr ;
188- FBB = nullptr ;
189- if (MBB.empty ())
190- return false ;
191- auto MI = MBB.getLastNonDebugInstr ();
192- if (!MI.isValid ())
193- return false ;
194-
195- // We do not allow to restructure blocks ending with OpBranchConditional,
196- // because there is no way to encode `if (Cond) then Stmt` logic, only
197- // full if-then-else is supported by OpBranchConditional.
198- // If we supported splitting of blocks ending with OpBranchConditional
199- // MachineBasicBlock.cpp would expect successfull implementation of calls
200- // to insertBranch() setting FBB to null that is not feasible.
201- if (MI->getOpcode () != SPIRV::OpBranch)
202- return true ;
203-
204- // Allow only 'unconditional branch' modifications of the basic block.
205- TBB = MI->getOperand (0 ).getMBB ();
206- return false ;
187+ // We do not allow to restructure blocks by results of analyzeBranch(),
188+ // because it may potentially break structured control flow and anyway
189+ // doubtedly may be useful in SPIRV, including such reasons as, e.g.:
190+ // 1) there is no way to encode `if (Cond) then Stmt` logic, only full
191+ // if-then-else is supported by OpBranchConditional, so if we supported
192+ // splitting of blocks ending with OpBranchConditional MachineBasicBlock.cpp
193+ // would expect successfull implementation of calls to insertBranch() setting
194+ // FBB to null that is not feasible; 2) it's not possible to delete
195+ // instructions after the unconditional branch, because this instruction must
196+ // be the last instruction in a block.
197+ return true ;
207198}
208199
209200// Remove the branching code at the end of the specific MBB.
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