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‎llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll‎

Lines changed: 120 additions & 144 deletions
Original file line numberDiff line numberDiff line change
@@ -2,265 +2,241 @@
22
; RUN: llc -mtriple=riscv32 -mattr=+experimental-p -verify-machineinstrs < %s | FileCheck %s
33

44
; Test basic add/sub operations for v2i16
5-
define <2 x i16> @test_padd_h(<2 x i16> %a, <2 x i16> %b) {
6-
; CHECK-LABEL: test_padd_h:
7-
; CHECK: # %bb.0:
8-
; CHECK-NEXT: padd.h a0, a0, a1
9-
; CHECK-NEXT: ret
5+
define void @test_padd_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
6+
%a = load <2 x i16>, ptr %a_ptr
7+
%b = load <2 x i16>, ptr %b_ptr
108
%res = add <2 x i16> %a, %b
11-
ret <2 x i16> %res
9+
store <2 x i16> %res, ptr %ret_ptr
10+
ret void
1211
}
1312

14-
define <2 x i16> @test_psub_h(<2 x i16> %a, <2 x i16> %b) {
15-
; CHECK-LABEL: test_psub_h:
16-
; CHECK: # %bb.0:
17-
; CHECK-NEXT: psub.h a0, a0, a1
18-
; CHECK-NEXT: ret
13+
define void @test_psub_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
14+
%a = load <2 x i16>, ptr %a_ptr
15+
%b = load <2 x i16>, ptr %b_ptr
1916
%res = sub <2 x i16> %a, %b
20-
ret <2 x i16> %res
17+
store <2 x i16> %res, ptr %ret_ptr
18+
ret void
2119
}
2220

2321
; Test basic add/sub operations for v4i8
24-
define <4 x i8> @test_padd_b(<4 x i8> %a, <4 x i8> %b) {
25-
; CHECK-LABEL: test_padd_b:
26-
; CHECK: # %bb.0:
27-
; CHECK-NEXT: padd.b a0, a0, a1
28-
; CHECK-NEXT: ret
22+
define void @test_padd_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
23+
%a = load <4 x i8>, ptr %a_ptr
24+
%b = load <4 x i8>, ptr %b_ptr
2925
%res = add <4 x i8> %a, %b
30-
ret <4 x i8> %res
26+
store <4 x i8> %res, ptr %ret_ptr
27+
ret void
3128
}
3229

33-
define <4 x i8> @test_psub_b(<4 x i8> %a, <4 x i8> %b) {
34-
; CHECK-LABEL: test_psub_b:
35-
; CHECK: # %bb.0:
36-
; CHECK-NEXT: psub.b a0, a0, a1
37-
; CHECK-NEXT: ret
30+
define void @test_psub_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
31+
%a = load <4 x i8>, ptr %a_ptr
32+
%b = load <4 x i8>, ptr %b_ptr
3833
%res = sub <4 x i8> %a, %b
39-
ret <4 x i8> %res
34+
store <4 x i8> %res, ptr %ret_ptr
35+
ret void
4036
}
4137

4238
; Test saturating add operations for v2i16
43-
define <2 x i16> @test_psadd_h(<2 x i16> %a, <2 x i16> %b) {
44-
; CHECK-LABEL: test_psadd_h:
45-
; CHECK: # %bb.0:
46-
; CHECK-NEXT: psadd.h a0, a0, a1
47-
; CHECK-NEXT: ret
39+
define void @test_psadd_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
40+
%a = load <2 x i16>, ptr %a_ptr
41+
%b = load <2 x i16>, ptr %b_ptr
4842
%res = call <2 x i16> @llvm.sadd.sat.v2i16(<2 x i16> %a, <2 x i16> %b)
49-
ret <2 x i16> %res
43+
store <2 x i16> %res, ptr %ret_ptr
44+
ret void
5045
}
5146

52-
define <2 x i16> @test_psaddu_h(<2 x i16> %a, <2 x i16> %b) {
53-
; CHECK-LABEL: test_psaddu_h:
54-
; CHECK: # %bb.0:
55-
; CHECK-NEXT: psaddu.h a0, a0, a1
56-
; CHECK-NEXT: ret
47+
define void @test_psaddu_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
48+
%a = load <2 x i16>, ptr %a_ptr
49+
%b = load <2 x i16>, ptr %b_ptr
5750
%res = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> %a, <2 x i16> %b)
58-
ret <2 x i16> %res
51+
store <2 x i16> %res, ptr %ret_ptr
52+
ret void
5953
}
6054

6155
; Test saturating sub operations for v2i16
62-
define <2 x i16> @test_pssub_h(<2 x i16> %a, <2 x i16> %b) {
63-
; CHECK-LABEL: test_pssub_h:
64-
; CHECK: # %bb.0:
65-
; CHECK-NEXT: pssub.h a0, a0, a1
66-
; CHECK-NEXT: ret
56+
define void @test_pssub_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
57+
%a = load <2 x i16>, ptr %a_ptr
58+
%b = load <2 x i16>, ptr %b_ptr
6759
%res = call <2 x i16> @llvm.ssub.sat.v2i16(<2 x i16> %a, <2 x i16> %b)
68-
ret <2 x i16> %res
60+
store <2 x i16> %res, ptr %ret_ptr
61+
ret void
6962
}
7063

71-
define <2 x i16> @test_pssubu_h(<2 x i16> %a, <2 x i16> %b) {
72-
; CHECK-LABEL: test_pssubu_h:
73-
; CHECK: # %bb.0:
74-
; CHECK-NEXT: pssubu.h a0, a0, a1
75-
; CHECK-NEXT: ret
64+
define void @test_pssubu_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
65+
%a = load <2 x i16>, ptr %a_ptr
66+
%b = load <2 x i16>, ptr %b_ptr
7667
%res = call <2 x i16> @llvm.usub.sat.v2i16(<2 x i16> %a, <2 x i16> %b)
77-
ret <2 x i16> %res
68+
store <2 x i16> %res, ptr %ret_ptr
69+
ret void
7870
}
7971

8072
; Test saturating add operations for v4i8
81-
define <4 x i8> @test_psadd_b(<4 x i8> %a, <4 x i8> %b) {
82-
; CHECK-LABEL: test_psadd_b:
83-
; CHECK: # %bb.0:
84-
; CHECK-NEXT: psadd.b a0, a0, a1
85-
; CHECK-NEXT: ret
73+
define void @test_psadd_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
74+
%a = load <4 x i8>, ptr %a_ptr
75+
%b = load <4 x i8>, ptr %b_ptr
8676
%res = call <4 x i8> @llvm.sadd.sat.v4i8(<4 x i8> %a, <4 x i8> %b)
87-
ret <4 x i8> %res
77+
store <4 x i8> %res, ptr %ret_ptr
78+
ret void
8879
}
8980

90-
define <4 x i8> @test_psaddu_b(<4 x i8> %a, <4 x i8> %b) {
91-
; CHECK-LABEL: test_psaddu_b:
92-
; CHECK: # %bb.0:
93-
; CHECK-NEXT: psaddu.b a0, a0, a1
94-
; CHECK-NEXT: ret
81+
define void @test_psaddu_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
82+
%a = load <4 x i8>, ptr %a_ptr
83+
%b = load <4 x i8>, ptr %b_ptr
9584
%res = call <4 x i8> @llvm.uadd.sat.v4i8(<4 x i8> %a, <4 x i8> %b)
96-
ret <4 x i8> %res
85+
store <4 x i8> %res, ptr %ret_ptr
86+
ret void
9787
}
9888

9989
; Test saturating sub operations for v4i8
100-
define <4 x i8> @test_pssub_b(<4 x i8> %a, <4 x i8> %b) {
101-
; CHECK-LABEL: test_pssub_b:
102-
; CHECK: # %bb.0:
103-
; CHECK-NEXT: pssub.b a0, a0, a1
104-
; CHECK-NEXT: ret
90+
define void @test_pssub_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
91+
%a = load <4 x i8>, ptr %a_ptr
92+
%b = load <4 x i8>, ptr %b_ptr
10593
%res = call <4 x i8> @llvm.ssub.sat.v4i8(<4 x i8> %a, <4 x i8> %b)
106-
ret <4 x i8> %res
94+
store <4 x i8> %res, ptr %ret_ptr
95+
ret void
10796
}
10897

109-
define <4 x i8> @test_pssubu_b(<4 x i8> %a, <4 x i8> %b) {
110-
; CHECK-LABEL: test_pssubu_b:
111-
; CHECK: # %bb.0:
112-
; CHECK-NEXT: pssubu.b a0, a0, a1
113-
; CHECK-NEXT: ret
98+
define void @test_pssubu_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
99+
%a = load <4 x i8>, ptr %a_ptr
100+
%b = load <4 x i8>, ptr %b_ptr
114101
%res = call <4 x i8> @llvm.usub.sat.v4i8(<4 x i8> %a, <4 x i8> %b)
115-
ret <4 x i8> %res
102+
store <4 x i8> %res, ptr %ret_ptr
103+
ret void
116104
}
117105

118106
; Test averaging floor signed operations for v2i16
119-
define <2 x i16> @test_paadd_h(<2 x i16> %a, <2 x i16> %b) {
120-
; CHECK-LABEL: test_paadd_h:
121-
; CHECK: # %bb.0:
122-
; CHECK-NEXT: paadd.h a0, a0, a1
123-
; CHECK-NEXT: ret
107+
define void @test_paadd_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
108+
%a = load <2 x i16>, ptr %a_ptr
109+
%b = load <2 x i16>, ptr %b_ptr
124110
%ext.a = sext <2 x i16> %a to <2 x i32>
125111
%ext.b = sext <2 x i16> %b to <2 x i32>
126112
%add = add nsw <2 x i32> %ext.a, %ext.b
127113
%shift = ashr <2 x i32> %add, <i32 1, i32 1>
128114
%res = trunc <2 x i32> %shift to <2 x i16>
129-
ret <2 x i16> %res
115+
store <2 x i16> %res, ptr %ret_ptr
116+
ret void
130117
}
131118

132119
; Test averaging floor unsigned operations for v2i16
133-
define <2 x i16> @test_paaddu_h(<2 x i16> %a, <2 x i16> %b) {
134-
; CHECK-LABEL: test_paaddu_h:
135-
; CHECK: # %bb.0:
136-
; CHECK-NEXT: paaddu.h a0, a0, a1
137-
; CHECK-NEXT: ret
120+
define void @test_paaddu_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
121+
%a = load <2 x i16>, ptr %a_ptr
122+
%b = load <2 x i16>, ptr %b_ptr
138123
%and = and <2 x i16> %a, %b
139124
%xor = xor <2 x i16> %a, %b
140125
%shift = lshr <2 x i16> %xor, <i16 1, i16 1>
141126
%res = add <2 x i16> %and, %shift
142-
ret <2 x i16> %res
127+
store <2 x i16> %res, ptr %ret_ptr
128+
ret void
143129
}
144130

145131
; Test averaging floor signed operations for v4i8
146-
define <4 x i8> @test_paadd_b(<4 x i8> %a, <4 x i8> %b) {
147-
; CHECK-LABEL: test_paadd_b:
148-
; CHECK: # %bb.0:
149-
; CHECK-NEXT: paadd.b a0, a0, a1
150-
; CHECK-NEXT: ret
132+
define void @test_paadd_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
133+
%a = load <4 x i8>, ptr %a_ptr
134+
%b = load <4 x i8>, ptr %b_ptr
151135
%ext.a = sext <4 x i8> %a to <4 x i16>
152136
%ext.b = sext <4 x i8> %b to <4 x i16>
153137
%add = add nsw <4 x i16> %ext.a, %ext.b
154138
%shift = ashr <4 x i16> %add, <i16 1, i16 1, i16 1, i16 1>
155139
%res = trunc <4 x i16> %shift to <4 x i8>
156-
ret <4 x i8> %res
140+
store <4 x i8> %res, ptr %ret_ptr
141+
ret void
157142
}
158143

159144
; Test averaging floor unsigned operations for v4i8
160-
define <4 x i8> @test_paaddu_b(<4 x i8> %a, <4 x i8> %b) {
161-
; CHECK-LABEL: test_paaddu_b:
162-
; CHECK: # %bb.0:
163-
; CHECK-NEXT: paaddu.b a0, a0, a1
164-
; CHECK-NEXT: ret
145+
define void @test_paaddu_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
146+
%a = load <4 x i8>, ptr %a_ptr
147+
%b = load <4 x i8>, ptr %b_ptr
165148
%and = and <4 x i8> %a, %b
166149
%xor = xor <4 x i8> %a, %b
167150
%shift = lshr <4 x i8> %xor, <i8 1, i8 1, i8 1, i8 1>
168151
%res = add <4 x i8> %and, %shift
169-
ret <4 x i8> %res
152+
store <4 x i8> %res, ptr %ret_ptr
153+
ret void
170154
}
171155

172156
; Test absolute difference signed for v2i16
173-
define <2 x i16> @test_pdif_h(<2 x i16> %a, <2 x i16> %b) {
174-
; CHECK-LABEL: test_pdif_h:
175-
; CHECK: # %bb.0:
176-
; CHECK-NEXT: pdif.h a0, a0, a1
177-
; CHECK-NEXT: ret
157+
define void @test_pdif_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
158+
%a = load <2 x i16>, ptr %a_ptr
159+
%b = load <2 x i16>, ptr %b_ptr
178160
%min = call <2 x i16> @llvm.smin.v2i16(<2 x i16> %a, <2 x i16> %b)
179161
%max = call <2 x i16> @llvm.smax.v2i16(<2 x i16> %a, <2 x i16> %b)
180162
%res = sub <2 x i16> %max, %min
181-
ret <2 x i16> %res
163+
store <2 x i16> %res, ptr %ret_ptr
164+
ret void
182165
}
183166

184167
; Test absolute difference unsigned for v2i16
185-
define <2 x i16> @test_pdifu_h(<2 x i16> %a, <2 x i16> %b) {
186-
; CHECK-LABEL: test_pdifu_h:
187-
; CHECK: # %bb.0:
188-
; CHECK-NEXT: pdifu.h a0, a0, a1
189-
; CHECK-NEXT: ret
168+
define void @test_pdifu_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
169+
%a = load <2 x i16>, ptr %a_ptr
170+
%b = load <2 x i16>, ptr %b_ptr
190171
%min = call <2 x i16> @llvm.umin.v2i16(<2 x i16> %a, <2 x i16> %b)
191172
%max = call <2 x i16> @llvm.umax.v2i16(<2 x i16> %a, <2 x i16> %b)
192173
%res = sub <2 x i16> %max, %min
193-
ret <2 x i16> %res
174+
store <2 x i16> %res, ptr %ret_ptr
175+
ret void
194176
}
195177

196178
; Test absolute difference signed for v4i8
197-
define <4 x i8> @test_pdif_b(<4 x i8> %a, <4 x i8> %b) {
198-
; CHECK-LABEL: test_pdif_b:
199-
; CHECK: # %bb.0:
200-
; CHECK-NEXT: pdif.b a0, a0, a1
201-
; CHECK-NEXT: ret
179+
define void @test_pdif_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
180+
%a = load <4 x i8>, ptr %a_ptr
181+
%b = load <4 x i8>, ptr %b_ptr
202182
%min = call <4 x i8> @llvm.smin.v4i8(<4 x i8> %a, <4 x i8> %b)
203183
%max = call <4 x i8> @llvm.smax.v4i8(<4 x i8> %a, <4 x i8> %b)
204184
%res = sub <4 x i8> %max, %min
205-
ret <4 x i8> %res
185+
store <4 x i8> %res, ptr %ret_ptr
186+
ret void
206187
}
207188

208189
; Test absolute difference unsigned for v4i8
209-
define <4 x i8> @test_pdifu_b(<4 x i8> %a, <4 x i8> %b) {
210-
; CHECK-LABEL: test_pdifu_b:
211-
; CHECK: # %bb.0:
212-
; CHECK-NEXT: pdifu.b a0, a0, a1
213-
; CHECK-NEXT: ret
190+
define void @test_pdifu_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
191+
%a = load <4 x i8>, ptr %a_ptr
192+
%b = load <4 x i8>, ptr %b_ptr
214193
%min = call <4 x i8> @llvm.umin.v4i8(<4 x i8> %a, <4 x i8> %b)
215194
%max = call <4 x i8> @llvm.umax.v4i8(<4 x i8> %a, <4 x i8> %b)
216195
%res = sub <4 x i8> %max, %min
217-
ret <4 x i8> %res
196+
store <4 x i8> %res, ptr %ret_ptr
197+
ret void
218198
}
219199

220200
; Test averaging floor subtraction signed for v2i16
221201
; pasub pattern: (a - b) arithmetic shift right 1
222-
define <2 x i16> @test_pasub_h(<2 x i16> %a, <2 x i16> %b) {
223-
; CHECK-LABEL: test_pasub_h:
224-
; CHECK: # %bb.0:
225-
; CHECK-NEXT: pasub.h a0, a0, a1
226-
; CHECK-NEXT: ret
202+
define void @test_pasub_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
203+
%a = load <2 x i16>, ptr %a_ptr
204+
%b = load <2 x i16>, ptr %b_ptr
227205
%sub = sub <2 x i16> %a, %b
228206
%res = ashr <2 x i16> %sub, <i16 1, i16 1>
229-
ret <2 x i16> %res
207+
store <2 x i16> %res, ptr %ret_ptr
208+
ret void
230209
}
231210

232211
; Test averaging floor subtraction unsigned for v2i16
233212
; pasubu pattern: (a - b) logical shift right 1
234-
define <2 x i16> @test_pasubu_h(<2 x i16> %a, <2 x i16> %b) {
235-
; CHECK-LABEL: test_pasubu_h:
236-
; CHECK: # %bb.0:
237-
; CHECK-NEXT: pasubu.h a0, a0, a1
238-
; CHECK-NEXT: ret
213+
define void @test_pasubu_h(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
214+
%a = load <2 x i16>, ptr %a_ptr
215+
%b = load <2 x i16>, ptr %b_ptr
239216
%sub = sub <2 x i16> %a, %b
240217
%res = lshr <2 x i16> %sub, <i16 1, i16 1>
241-
ret <2 x i16> %res
218+
store <2 x i16> %res, ptr %ret_ptr
219+
ret void
242220
}
243221

244222
; Test averaging floor subtraction signed for v4i8
245-
define <4 x i8> @test_pasub_b(<4 x i8> %a, <4 x i8> %b) {
246-
; CHECK-LABEL: test_pasub_b:
247-
; CHECK: # %bb.0:
248-
; CHECK-NEXT: pasub.b a0, a0, a1
249-
; CHECK-NEXT: ret
223+
define void @test_pasub_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
224+
%a = load <4 x i8>, ptr %a_ptr
225+
%b = load <4 x i8>, ptr %b_ptr
250226
%sub = sub <4 x i8> %a, %b
251227
%res = ashr <4 x i8> %sub, <i8 1, i8 1, i8 1, i8 1>
252-
ret <4 x i8> %res
228+
store <4 x i8> %res, ptr %ret_ptr
229+
ret void
253230
}
254231

255232
; Test averaging floor subtraction unsigned for v4i8
256-
define <4 x i8> @test_pasubu_b(<4 x i8> %a, <4 x i8> %b) {
257-
; CHECK-LABEL: test_pasubu_b:
258-
; CHECK: # %bb.0:
259-
; CHECK-NEXT: pasubu.b a0, a0, a1
260-
; CHECK-NEXT: ret
233+
define void @test_pasubu_b(ptr %ret_ptr, ptr %a_ptr, ptr %b_ptr) {
234+
%a = load <4 x i8>, ptr %a_ptr
235+
%b = load <4 x i8>, ptr %b_ptr
261236
%sub = sub <4 x i8> %a, %b
262237
%res = lshr <4 x i8> %sub, <i8 1, i8 1, i8 1, i8 1>
263-
ret <4 x i8> %res
238+
store <4 x i8> %res, ptr %ret_ptr
239+
ret void
264240
}
265241

266242
; Intrinsic declarations

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