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Added opt. Updated tests.
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12 files changed

+73
-86
lines changed

12 files changed

+73
-86
lines changed

llvm/lib/Analysis/ValueTracking.cpp

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2370,6 +2370,25 @@ void computeKnownBits(const Value *V, const APInt &DemandedElts,
23702370
if (isa<PointerType>(V->getType())) {
23712371
Align Alignment = V->getPointerAlignment(Q.DL);
23722372
Known.Zero.setLowBits(Log2(Alignment));
2373+
if (Q.CxtI) {
2374+
const Function *CxtFunc = Q.CxtI->getFunction();
2375+
unsigned NumUsersExplored = 0;
2376+
for (auto *User : V->users()) {
2377+
if (NumUsersExplored >= DomConditionsMaxUses)
2378+
break;
2379+
++NumUsersExplored;
2380+
if (auto *PtrOp = getLoadStorePointerOperand(User)) {
2381+
auto *I = cast<Instruction>(User);
2382+
auto Zeros = Log2(getLoadStoreAlignment(I));
2383+
if (V != PtrOp || Known.countMinTrailingZeros() >= Zeros ||
2384+
I->getFunction() != CxtFunc ||
2385+
!isValidAssumeForContext(I, Q.CxtI, Q.DT)) {
2386+
continue;
2387+
}
2388+
Known.Zero.setLowBits(Zeros);
2389+
}
2390+
}
2391+
}
23732392
}
23742393

23752394
// computeKnownBitsFromContext strictly refines Known.

llvm/test/CodeGen/PowerPC/MergeConsecutiveStores.ll

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -56,13 +56,13 @@ entry:
5656
;; CHECK: blr
5757
define void @g() {
5858
entry:
59-
%0 = load i32, ptr @fx, align 16
60-
%1 = load i32, ptr getelementptr inbounds (%struct.X, ptr @fx, i32 0, i32 1), align 4
61-
%2 = load i32, ptr getelementptr inbounds (%struct.X, ptr @fx, i32 0, i32 2), align 4
62-
%3 = load i32, ptr getelementptr inbounds (%struct.X, ptr @fx, i32 0, i32 3), align 4
63-
store i32 %0, ptr @fy, align 16
64-
store i32 %1, ptr getelementptr inbounds (%struct.X, ptr @fy, i32 0, i32 1), align 4
65-
store i32 %2, ptr getelementptr inbounds (%struct.X, ptr @fy, i32 0, i32 2), align 4
66-
store i32 %3, ptr getelementptr inbounds (%struct.X, ptr @fy, i32 0, i32 3), align 4
59+
%0 = load i32, ptr @gx, align 16
60+
%1 = load i32, ptr getelementptr inbounds (%struct.X, ptr @gx, i32 0, i32 1), align 4
61+
%2 = load i32, ptr getelementptr inbounds (%struct.X, ptr @gx, i32 0, i32 2), align 4
62+
%3 = load i32, ptr getelementptr inbounds (%struct.X, ptr @gx, i32 0, i32 3), align 4
63+
store i32 %0, ptr @gy, align 16
64+
store i32 %1, ptr getelementptr inbounds (%struct.X, ptr @gy, i32 0, i32 1), align 4
65+
store i32 %2, ptr getelementptr inbounds (%struct.X, ptr @gy, i32 0, i32 2), align 4
66+
store i32 %3, ptr getelementptr inbounds (%struct.X, ptr @gy, i32 0, i32 3), align 4
6767
ret void
6868
}

llvm/test/Transforms/Coroutines/coro-retcon-once-value.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -160,7 +160,7 @@ declare void @print(i32)
160160
; CHECK-NEXT: [[TMP0:%.*]] = tail call ptr @allocate(i32 16)
161161
; CHECK-NEXT: store ptr [[TMP0]], ptr [[BUFFER:%.*]], align 8
162162
; CHECK-NEXT: [[VAL_SPILL_ADDR:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP0]], i64 8
163-
; CHECK-NEXT: store i32 [[VAL:%.*]], ptr [[VAL_SPILL_ADDR]], align 4
163+
; CHECK-NEXT: store i32 [[VAL:%.*]], ptr [[VAL_SPILL_ADDR]], align 8
164164
; CHECK-NEXT: store ptr [[ARRAY:%.*]], ptr [[TMP0]], align 8
165165
; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[ARRAY]], align 4
166166
; CHECK-NEXT: [[LOAD_POS:%.*]] = icmp sgt i32 [[LOAD]], 0

llvm/test/Transforms/InstCombine/assume.ll

Lines changed: 17 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -11,18 +11,13 @@ declare void @llvm.assume(i1) #1
1111
; Check that the assume has not been removed:
1212

1313
define i32 @align_to_bundle(ptr %a) #0 {
14-
; DEFAULT-LABEL: @align_to_bundle(
15-
; DEFAULT-NEXT: [[T0:%.*]] = load i32, ptr [[A:%.*]], align 4
16-
; DEFAULT-NEXT: [[PTRINT:%.*]] = ptrtoint ptr [[A]] to i64
17-
; DEFAULT-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 31
18-
; DEFAULT-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
19-
; DEFAULT-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
20-
; DEFAULT-NEXT: ret i32 [[T0]]
21-
;
22-
; BUNDLES-LABEL: @align_to_bundle(
23-
; BUNDLES-NEXT: [[T0:%.*]] = load i32, ptr [[A:%.*]], align 4
24-
; BUNDLES-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i64 32) ]
25-
; BUNDLES-NEXT: ret i32 [[T0]]
14+
; CHECK-LABEL: @align_to_bundle(
15+
; CHECK-NEXT: [[T0:%.*]] = load i32, ptr [[A:%.*]], align 4
16+
; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint ptr [[A]] to i64
17+
; CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 28
18+
; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
19+
; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
20+
; CHECK-NEXT: ret i32 [[T0]]
2621
;
2722
%t0 = load i32, ptr %a, align 4
2823
%ptrint = ptrtoint ptr %a to i64
@@ -55,18 +50,9 @@ define i32 @align_to_bundle_ptrtoaddr(ptr %a) #0 {
5550
}
5651

5752
define i32 @align_assume_trunc_cond(ptr %a) #0 {
58-
; DEFAULT-LABEL: @align_assume_trunc_cond(
59-
; DEFAULT-NEXT: [[T0:%.*]] = load i32, ptr [[A:%.*]], align 4
60-
; DEFAULT-NEXT: [[PTRINT:%.*]] = ptrtoint ptr [[A]] to i64
61-
; DEFAULT-NEXT: [[TRUNC:%.*]] = trunc i64 [[PTRINT]] to i1
62-
; DEFAULT-NEXT: [[MASKCOND:%.*]] = xor i1 [[TRUNC]], true
63-
; DEFAULT-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
64-
; DEFAULT-NEXT: ret i32 [[T0]]
65-
;
66-
; BUNDLES-LABEL: @align_assume_trunc_cond(
67-
; BUNDLES-NEXT: [[T0:%.*]] = load i32, ptr [[A:%.*]], align 4
68-
; BUNDLES-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i64 2) ]
69-
; BUNDLES-NEXT: ret i32 [[T0]]
53+
; CHECK-LABEL: @align_assume_trunc_cond(
54+
; CHECK-NEXT: [[T0:%.*]] = load i32, ptr [[A:%.*]], align 4
55+
; CHECK-NEXT: ret i32 [[T0]]
7056
;
7157
%t0 = load i32, ptr %a, align 4
7258
%ptrint = ptrtoint ptr %a to i64
@@ -79,18 +65,13 @@ define i32 @align_assume_trunc_cond(ptr %a) #0 {
7965
; Same check as in @foo1, but make sure it works if the assume is first too.
8066

8167
define i32 @foo2(ptr %a) #0 {
82-
; DEFAULT-LABEL: @foo2(
83-
; DEFAULT-NEXT: [[PTRINT:%.*]] = ptrtoint ptr [[A:%.*]] to i64
84-
; DEFAULT-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 31
85-
; DEFAULT-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
86-
; DEFAULT-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
87-
; DEFAULT-NEXT: [[T0:%.*]] = load i32, ptr [[A]], align 4
88-
; DEFAULT-NEXT: ret i32 [[T0]]
89-
;
90-
; BUNDLES-LABEL: @foo2(
91-
; BUNDLES-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr [[A:%.*]], i64 32) ]
92-
; BUNDLES-NEXT: [[T0:%.*]] = load i32, ptr [[A]], align 4
93-
; BUNDLES-NEXT: ret i32 [[T0]]
68+
; CHECK-LABEL: @foo2(
69+
; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint ptr [[A:%.*]] to i64
70+
; CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 28
71+
; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
72+
; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
73+
; CHECK-NEXT: [[T0:%.*]] = load i32, ptr [[A]], align 4
74+
; CHECK-NEXT: ret i32 [[T0]]
9475
;
9576
%ptrint = ptrtoint ptr %a to i64
9677
%maskedptr = and i64 %ptrint, 31

llvm/test/Transforms/InstCombine/assume_inevitable.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ define i32 @assume_inevitable(ptr %a, ptr %b, ptr %c) {
1717
; CHECK-NEXT: [[OBJSZ:%.*]] = call i64 @llvm.objectsize.i64.p0(ptr [[C:%.*]], i1 false, i1 false, i1 false)
1818
; CHECK-NEXT: store i64 [[OBJSZ]], ptr [[M_A]], align 4
1919
; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint ptr [[A]] to i64
20-
; CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 31
20+
; CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 28
2121
; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
2222
; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
2323
; CHECK-NEXT: ret i32 [[TMP0]]

llvm/test/Transforms/InstCombine/load-store-forward.ll

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -273,7 +273,7 @@ define i1 @load_i1_store_i8(ptr %a) {
273273

274274
define i32 @load_after_memset_0(ptr %a) {
275275
; CHECK-LABEL: @load_after_memset_0(
276-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
276+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
277277
; CHECK-NEXT: ret i32 0
278278
;
279279
call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)
@@ -283,7 +283,7 @@ define i32 @load_after_memset_0(ptr %a) {
283283

284284
define float @load_after_memset_0_float(ptr %a) {
285285
; CHECK-LABEL: @load_after_memset_0_float(
286-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
286+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
287287
; CHECK-NEXT: ret float 0.000000e+00
288288
;
289289
call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)
@@ -293,7 +293,7 @@ define float @load_after_memset_0_float(ptr %a) {
293293

294294
define i27 @load_after_memset_0_non_byte_sized(ptr %a) {
295295
; CHECK-LABEL: @load_after_memset_0_non_byte_sized(
296-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
296+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
297297
; CHECK-NEXT: ret i27 0
298298
;
299299
call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)
@@ -313,7 +313,7 @@ define i1 @load_after_memset_0_i1(ptr %a) {
313313

314314
define <4 x i8> @load_after_memset_0_vec(ptr %a) {
315315
; CHECK-LABEL: @load_after_memset_0_vec(
316-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
316+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
317317
; CHECK-NEXT: ret <4 x i8> zeroinitializer
318318
;
319319
call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)
@@ -323,7 +323,7 @@ define <4 x i8> @load_after_memset_0_vec(ptr %a) {
323323

324324
define i32 @load_after_memset_1(ptr %a) {
325325
; CHECK-LABEL: @load_after_memset_1(
326-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 1, i64 16, i1 false)
326+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) [[A:%.*]], i8 1, i64 16, i1 false)
327327
; CHECK-NEXT: ret i32 16843009
328328
;
329329
call void @llvm.memset.p0.i64(ptr %a, i8 1, i64 16, i1 false)
@@ -333,7 +333,7 @@ define i32 @load_after_memset_1(ptr %a) {
333333

334334
define float @load_after_memset_1_float(ptr %a) {
335335
; CHECK-LABEL: @load_after_memset_1_float(
336-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 1, i64 16, i1 false)
336+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) [[A:%.*]], i8 1, i64 16, i1 false)
337337
; CHECK-NEXT: ret float 0x3820202020000000
338338
;
339339
call void @llvm.memset.p0.i64(ptr %a, i8 1, i64 16, i1 false)
@@ -343,7 +343,7 @@ define float @load_after_memset_1_float(ptr %a) {
343343

344344
define i27 @load_after_memset_1_non_byte_sized(ptr %a) {
345345
; CHECK-LABEL: @load_after_memset_1_non_byte_sized(
346-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 1, i64 16, i1 false)
346+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) [[A:%.*]], i8 1, i64 16, i1 false)
347347
; CHECK-NEXT: ret i27 16843009
348348
;
349349
call void @llvm.memset.p0.i64(ptr %a, i8 1, i64 16, i1 false)
@@ -363,7 +363,7 @@ define i1 @load_after_memset_1_i1(ptr %a) {
363363

364364
define <4 x i8> @load_after_memset_1_vec(ptr %a) {
365365
; CHECK-LABEL: @load_after_memset_1_vec(
366-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 1, i64 16, i1 false)
366+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) [[A:%.*]], i8 1, i64 16, i1 false)
367367
; CHECK-NEXT: ret <4 x i8> splat (i8 1)
368368
;
369369
call void @llvm.memset.p0.i64(ptr %a, i8 1, i64 16, i1 false)
@@ -373,7 +373,7 @@ define <4 x i8> @load_after_memset_1_vec(ptr %a) {
373373

374374
define i32 @load_after_memset_unknown(ptr %a, i8 %byte) {
375375
; CHECK-LABEL: @load_after_memset_unknown(
376-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 [[BYTE:%.*]], i64 16, i1 false)
376+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) [[A:%.*]], i8 [[BYTE:%.*]], i64 16, i1 false)
377377
; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[A]], align 4
378378
; CHECK-NEXT: ret i32 [[V]]
379379
;
@@ -456,7 +456,7 @@ define i32 @load_after_memset_0_offset_negative(ptr %a) {
456456

457457
define i32 @load_after_memset_0_clobber(ptr %a) {
458458
; CHECK-LABEL: @load_after_memset_0_clobber(
459-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
459+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
460460
; CHECK-NEXT: store i8 1, ptr [[A]], align 1
461461
; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[A]], align 4
462462
; CHECK-NEXT: ret i32 [[V]]
@@ -469,7 +469,7 @@ define i32 @load_after_memset_0_clobber(ptr %a) {
469469

470470
define i256 @load_after_memset_0_too_small(ptr %a) {
471471
; CHECK-LABEL: @load_after_memset_0_too_small(
472-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
472+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
473473
; CHECK-NEXT: [[V:%.*]] = load i256, ptr [[A]], align 4
474474
; CHECK-NEXT: ret i256 [[V]]
475475
;
@@ -480,7 +480,7 @@ define i256 @load_after_memset_0_too_small(ptr %a) {
480480

481481
define i129 @load_after_memset_0_too_small_by_one_bit(ptr %a) {
482482
; CHECK-LABEL: @load_after_memset_0_too_small_by_one_bit(
483-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
483+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
484484
; CHECK-NEXT: [[V:%.*]] = load i129, ptr [[A]], align 4
485485
; CHECK-NEXT: ret i129 [[V]]
486486
;
@@ -491,7 +491,7 @@ define i129 @load_after_memset_0_too_small_by_one_bit(ptr %a) {
491491

492492
define i32 @load_after_memset_0_unknown_length(ptr %a, i64 %len) {
493493
; CHECK-LABEL: @load_after_memset_0_unknown_length(
494-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[A:%.*]], i8 0, i64 [[LEN:%.*]], i1 false)
494+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[A:%.*]], i8 0, i64 [[LEN:%.*]], i1 false)
495495
; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[A]], align 4
496496
; CHECK-NEXT: ret i32 [[V]]
497497
;
@@ -502,7 +502,7 @@ define i32 @load_after_memset_0_unknown_length(ptr %a, i64 %len) {
502502

503503
define i32 @load_after_memset_0_atomic(ptr %a) {
504504
; CHECK-LABEL: @load_after_memset_0_atomic(
505-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
505+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
506506
; CHECK-NEXT: [[V:%.*]] = load atomic i32, ptr [[A]] seq_cst, align 4
507507
; CHECK-NEXT: ret i32 [[V]]
508508
;
@@ -513,7 +513,7 @@ define i32 @load_after_memset_0_atomic(ptr %a) {
513513

514514
define <vscale x 1 x i32> @load_after_memset_0_scalable(ptr %a) {
515515
; CHECK-LABEL: @load_after_memset_0_scalable(
516-
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
516+
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
517517
; CHECK-NEXT: [[V:%.*]] = load <vscale x 1 x i32>, ptr [[A]], align 4
518518
; CHECK-NEXT: ret <vscale x 1 x i32> [[V]]
519519
;

llvm/test/Transforms/InstCombine/memcpy_alloca.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -61,7 +61,7 @@ define void @test6(ptr %dest) {
6161
; CHECK-NEXT: [[A:%.*]] = alloca [7 x i8], align 1
6262
; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds nuw i8, ptr [[A]], i64 2
6363
; CHECK-NEXT: store i16 42, ptr [[P2]], align 2
64-
; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(7) [[DEST:%.*]], ptr noundef nonnull align 1 dereferenceable(7) [[P2]], i64 7, i1 false)
64+
; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(7) [[DEST:%.*]], ptr noundef nonnull align 2 dereferenceable(7) [[P2]], i64 7, i1 false)
6565
; CHECK-NEXT: ret void
6666
;
6767
%a = alloca [7 x i8]

llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -207,7 +207,7 @@ define i32 @test_memcpy_after_phi(i1 %cond, ptr %ptr) {
207207
; CHECK-NEXT: br label [[JOIN]]
208208
; CHECK: join:
209209
; CHECK-NEXT: [[PHI:%.*]] = phi ptr [ [[A]], [[IF]] ], [ [[PTR:%.*]], [[ENTRY:%.*]] ]
210-
; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 1 dereferenceable(32) [[PHI]], ptr noundef nonnull align 16 dereferenceable(32) @g1, i64 32, i1 false)
210+
; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(32) [[PHI]], ptr noundef nonnull align 16 dereferenceable(32) @g1, i64 32, i1 false)
211211
; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[PHI]], align 4
212212
; CHECK-NEXT: ret i32 [[V]]
213213
;

llvm/test/Transforms/InstCombine/redundant-add-in-and.ll

Lines changed: 6 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -6,11 +6,8 @@ define i1 @addition_and_bitwise1(ptr %0) {
66
; CHECK-SAME: ptr [[TMP0:%.*]]) {
77
; CHECK-NEXT: [[V0:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP0]], i64 4
88
; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[V0]], align 4
9-
; CHECK-NEXT: [[V2:%.*]] = zext i32 [[V1]] to i64
10-
; CHECK-NEXT: [[V3:%.*]] = ptrtoint ptr [[V0]] to i64
11-
; CHECK-NEXT: [[V4:%.*]] = add i64 [[V2]], [[V3]]
12-
; CHECK-NEXT: [[V5:%.*]] = and i64 [[V4]], 2
13-
; CHECK-NEXT: [[V6:%.*]] = icmp eq i64 [[V5]], 0
9+
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[V1]], 2
10+
; CHECK-NEXT: [[V6:%.*]] = icmp eq i32 [[TMP2]], 0
1411
; CHECK-NEXT: ret i1 [[V6]]
1512
;
1613
%v0 = getelementptr inbounds nuw i8, ptr %0, i64 4
@@ -28,11 +25,8 @@ define i1 @addition_and_bitwise2(ptr %0) {
2825
; CHECK-SAME: ptr [[TMP0:%.*]]) {
2926
; CHECK-NEXT: [[V0:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP0]], i64 4
3027
; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[V0]], align 16
31-
; CHECK-NEXT: [[V2:%.*]] = zext i32 [[V1]] to i64
32-
; CHECK-NEXT: [[V3:%.*]] = ptrtoint ptr [[V0]] to i64
33-
; CHECK-NEXT: [[V4:%.*]] = add i64 [[V2]], [[V3]]
34-
; CHECK-NEXT: [[V5:%.*]] = and i64 [[V4]], 4
35-
; CHECK-NEXT: [[V6:%.*]] = icmp eq i64 [[V5]], 0
28+
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[V1]], 4
29+
; CHECK-NEXT: [[V6:%.*]] = icmp eq i32 [[TMP2]], 0
3630
; CHECK-NEXT: ret i1 [[V6]]
3731
;
3832
%v0 = getelementptr inbounds nuw i8, ptr %0, i64 4
@@ -50,11 +44,8 @@ define i1 @addition_and_bitwise3(ptr %0) {
5044
; CHECK-SAME: ptr [[TMP0:%.*]]) {
5145
; CHECK-NEXT: [[V0:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP0]], i64 4
5246
; CHECK-NEXT: [[V1:%.*]] = load i32, ptr [[V0]], align 16
53-
; CHECK-NEXT: [[V2:%.*]] = zext i32 [[V1]] to i64
54-
; CHECK-NEXT: [[V3:%.*]] = ptrtoint ptr [[V0]] to i64
55-
; CHECK-NEXT: [[V4:%.*]] = add i64 [[V3]], [[V2]]
56-
; CHECK-NEXT: [[V5:%.*]] = and i64 [[V4]], 4
57-
; CHECK-NEXT: [[V6:%.*]] = icmp eq i64 [[V5]], 0
47+
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[V1]], 4
48+
; CHECK-NEXT: [[V6:%.*]] = icmp eq i32 [[TMP2]], 0
5849
; CHECK-NEXT: ret i1 [[V6]]
5950
;
6051
%v0 = getelementptr inbounds nuw i8, ptr %0, i64 4

llvm/test/Transforms/InstCombine/shift-amount-reassociation-in-bittest.ll

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -674,11 +674,7 @@ define i1 @constantexpr() {
674674
; CHECK-LABEL: @constantexpr(
675675
; CHECK-NEXT: entry:
676676
; CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f.a, align 2
677-
; CHECK-NEXT: [[SHR:%.*]] = lshr i16 [[TMP0]], 1
678-
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i16 ptrtoint (ptr @f.a to i16), 1
679-
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i16
680-
; CHECK-NEXT: [[TMP1:%.*]] = shl nuw nsw i16 1, [[ZEXT]]
681-
; CHECK-NEXT: [[TMP2:%.*]] = and i16 [[SHR]], [[TMP1]]
677+
; CHECK-NEXT: [[TMP2:%.*]] = and i16 [[TMP0]], 4
682678
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i16 [[TMP2]], 0
683679
; CHECK-NEXT: ret i1 [[TOBOOL]]
684680
;

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