Add support for Operand Imm32

Change-Id: I49b82a0333ab216d7b150027d973f11d4cbdf35c

Author: hchandel

llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

@@ -1046,6 +1046,20 @@ struct RISCVOperand final : public MCParsedAsmOperand {
            isInt<26>(fixImmediateForRV32(Imm, isRV64Imm()));
   }
 
+  bool isImm32() const {
+    int64_t Imm;
+    RISCVMCExpr::VariantKind VK = RISCVMCExpr::VK_RISCV_None;
+    if (!isImm())
+      return false;
+    bool IsConstantImm = evaluateConstantImm(getImm(), Imm, VK);
+    bool IsValid;
+    if (!IsConstantImm)
+      IsValid = RISCVAsmParser::classifySymbolRef(getImm(), VK);
+    else
+      IsValid = isInt<32>(Imm) || isUInt<32>(Imm);
+    return IsValid && VK == RISCVMCExpr::VK_RISCV_None;
+  }
+
   /// getStartLoc - Gets location of the first token of this operand
   SMLoc getStartLoc() const override { return StartLoc; }
   /// getEndLoc - Gets location of the last token of this operand
@@ -1689,6 +1703,10 @@ bool RISCVAsmParser::matchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
   case Match_InvalidSImm26:
     return generateImmOutOfRangeError(Operands, ErrorInfo, -(1 << 25),
                                       (1 << 25) - 1);
+  case Match_InvalidImm32:
+    return generateImmOutOfRangeError(Operands, ErrorInfo,
+                                      std::numeric_limits<int32_t>::min(),
+                                      std::numeric_limits<uint32_t>::max());
   case Match_InvalidRlist: {
     SMLoc ErrorLoc = ((RISCVOperand &)*Operands[ErrorInfo]).getStartLoc();
     return Error(

llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h

@@ -333,6 +333,7 @@ enum OperandType : unsigned {
   OPERAND_SIMM12,
   OPERAND_SIMM12_LSB00000,
   OPERAND_SIMM26,
+  OPERAND_IMM32,
   OPERAND_CLUI_IMM,
   OPERAND_VTYPEI10,
   OPERAND_VTYPEI11,

llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td

@@ -34,6 +34,21 @@ def uimm11 : RISCVUImmLeafOp<11>;
 
 def simm26 : RISCVSImmLeafOp<26>;
 
+// 32-bit Immediate, used by RV32 Instructions in 32-bit operations, so no
+// sign-/zero-extension. This is represented internally as a signed 32-bit value.
+def imm32 : RISCVOp<XLenVT> {
+  let ParserMatchClass = ImmAsmOperand<"", 32, "">;
+  let EncoderMethod = "getImmOpValue";
+  let DecoderMethod = "decodeSImmOperand<32>";
+  let OperandType = "OPERAND_IMM32";
+  let MCOperandPredicate = [{
+    int64_t Imm;
+    if (MCOp.evaluateAsConstantImm(Imm))
+      return (isInt<32>(Imm) || isUint<32>(Imm));
+    return MCOp.isBareSymbolRef();
+  }];
+}
+
 //===----------------------------------------------------------------------===//
 // Instruction Formats
 //===----------------------------------------------------------------------===//