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Change-Id: Ifeba39acab171c75df496f89688fda701bd7dd85
1 parent 1bb0ad6 commit c0298c8

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2 files changed

+7
-8
lines changed

2 files changed

+7
-8
lines changed

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -21007,7 +21007,8 @@ static SDValue trySQDMULHCombine(SDNode *N, SelectionDAG &DAG) {
2100721007

2100821008
EVT DestVT = N->getValueType(0);
2100921009

21010-
if (!DestVT.isVector() || DestVT.getScalarSizeInBits() > 64 || DestVT.isScalableVector())
21010+
if (!DestVT.isVector() || DestVT.getScalarSizeInBits() > 64 ||
21011+
DestVT.isScalableVector())
2101121012
return SDValue();
2101221013

2101321014
ConstantSDNode *Clamp = isConstOrConstSplat(N->getOperand(1));
@@ -21056,8 +21057,7 @@ static SDValue trySQDMULHCombine(SDNode *N, SelectionDAG &DAG) {
2105621057
EVT SExt0Type = SExt0.getOperand(0).getValueType();
2105721058
EVT SExt1Type = SExt1.getOperand(0).getValueType();
2105821059

21059-
if (SExt0Type != SExt1Type ||
21060-
SExt0Type.getScalarType() != ScalarType ||
21060+
if (SExt0Type != SExt1Type || SExt0Type.getScalarType() != ScalarType ||
2106121061
SExt0Type.getFixedSizeInBits() > 128)
2106221062
return SDValue();
2106321063

@@ -21067,10 +21067,9 @@ static SDValue trySQDMULHCombine(SDNode *N, SelectionDAG &DAG) {
2106721067

2106821068
// Ensure input vectors are extended to legal types
2106921069
if (SExt0Type.getFixedSizeInBits() < 64) {
21070-
unsigned VecNumElements = SExt0Type.getVectorNumElements();
21071-
EVT ExtVecVT =
21072-
MVT::getVectorVT(MVT::getIntegerVT(64 / VecNumElements),
21073-
VecNumElements);
21070+
unsigned VecNumElements = SExt0Type.getVectorNumElements();
21071+
EVT ExtVecVT = MVT::getVectorVT(MVT::getIntegerVT(64 / VecNumElements),
21072+
VecNumElements);
2107421073
V0 = DAG.getNode(ISD::SIGN_EXTEND, DL, ExtVecVT, V0);
2107521074
V1 = DAG.getNode(ISD::SIGN_EXTEND, DL, ExtVecVT, V1);
2107621075
}

llvm/test/CodeGen/AArch64/saturating-vec-smull.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -160,7 +160,7 @@ define <2 x i16> @extend_to_illegal_type(<2 x i16> %a, <2 x i16> %b) {
160160
}
161161

162162
define <2 x i11> @illegal_source(<2 x i11> %a, <2 x i11> %b) {
163-
; CHECK-LABEL: source_is_illegal:
163+
; CHECK-LABEL: illegal_source:
164164
; CHECK: // %bb.0:
165165
; CHECK-NEXT: shl v0.2s, v0.2s, #21
166166
; CHECK-NEXT: shl v1.2s, v1.2s, #21

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