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* Add assert to guard against 64b vectortypes
* Use Lane variable instead of repeatedly dereferencing M[0] * Wording change for comment
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llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -13433,6 +13433,7 @@ static bool isUZP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) {
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/// isDUPQMask - matches a splat of equivalent lanes within 128b segments in
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/// the first vector operand.
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static std::optional<unsigned> isDUPQMask(ArrayRef<int> M, EVT VT) {
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assert(VT.getFixedSizeInBits() % 128 == 0 && "Unsupported SVE vector size");
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unsigned Lane = (unsigned)M[0];
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unsigned Segments = VT.getFixedSizeInBits() / 128;
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unsigned SegmentElts = VT.getVectorNumElements() / Segments;
@@ -13441,14 +13442,13 @@ static std::optional<unsigned> isDUPQMask(ArrayRef<int> M, EVT VT) {
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if (SegmentElts * Segments != M.size())
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return std::nullopt;
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// Check that the first index corresponds to one of the lanes in the first
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// segment.
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if ((unsigned)M[0] >= SegmentElts)
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// Check the first index corresponds to one of the lanes in the first segment.
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if (Lane >= SegmentElts)
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return std::nullopt;
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// Check that all lanes match the first, adjusted for segment.
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for (unsigned I = 0; I < M.size(); ++I)
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if ((unsigned)M[I] != ((unsigned)M[0] + ((I / SegmentElts) * SegmentElts)))
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if ((unsigned)M[I] != (Lane + ((I / SegmentElts) * SegmentElts)))
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return std::nullopt;
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return Lane;

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