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[LoongArch][NFC] Pre-commit scalarize fp tests and fix for la32
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3 files changed

+159
-4
lines changed

3 files changed

+159
-4
lines changed

llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1610,11 +1610,9 @@ lowerVECTOR_SHUFFLE_VREPLVEI(const SDLoc &DL, ArrayRef<int> Mask, MVT VT,
16101610
return DAG.getUNDEF(VT);
16111611

16121612
assert(SplatIndex < (int)Mask.size() && "Out of bounds mask index");
1613-
if (fitsRegularPattern<int>(Mask.begin(), 1, Mask.end(), SplatIndex, 0)) {
1614-
APInt Imm(64, SplatIndex);
1613+
if (fitsRegularPattern<int>(Mask.begin(), 1, Mask.end(), SplatIndex, 0))
16151614
return DAG.getNode(LoongArchISD::VREPLVEI, DL, VT, V1,
1616-
DAG.getConstant(Imm, DL, Subtarget.getGRLenVT()));
1617-
}
1615+
DAG.getConstant(SplatIndex, DL, Subtarget.getGRLenVT()));
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16191617
return SDValue();
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}
Lines changed: 84 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,84 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc --mtriple=loongarch32 -mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32
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; RUN: llc --mtriple=loongarch64 -mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64
4+
5+
define <8 x float> @fadd_elt0_v8f32(float %a) nounwind {
6+
; CHECK-LABEL: fadd_elt0_v8f32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: # kill: def $f0 killed $f0 def $xr0
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; CHECK-NEXT: lu12i.w $a0, 260096
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; CHECK-NEXT: xvreplgr2vr.w $xr1, $a0
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; CHECK-NEXT: xvfadd.s $xr0, $xr0, $xr1
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; CHECK-NEXT: ret
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entry:
14+
%b = insertelement <8 x float> poison, float %a, i32 0
15+
%c = fadd <8 x float> %b, <float 1.0, float poison, float poison, float poison, float poison, float poison, float poison, float poison>
16+
ret <8 x float> %c
17+
}
18+
19+
define <4 x double> @fadd_elt0_v4f64(double %a) nounwind {
20+
; LA32-LABEL: fadd_elt0_v4f64:
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; LA32: # %bb.0: # %entry
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; LA32-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0
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; LA32-NEXT: vldi $vr1, -912
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; LA32-NEXT: xvfadd.d $xr0, $xr0, $xr1
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; LA32-NEXT: ret
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;
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; LA64-LABEL: fadd_elt0_v4f64:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0
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; LA64-NEXT: lu52i.d $a0, $zero, 1023
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; LA64-NEXT: xvreplgr2vr.d $xr1, $a0
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; LA64-NEXT: xvfadd.d $xr0, $xr0, $xr1
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; LA64-NEXT: ret
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entry:
35+
%b = insertelement <4 x double> poison, double %a, i32 0
36+
%c = fadd <4 x double> %b, <double 1.0, double poison, double poison, double poison>
37+
ret <4 x double> %c
38+
}
39+
40+
define <8 x float> @fsub_splat_v8f32(float %a, float %b) nounwind {
41+
; CHECK-LABEL: fsub_splat_v8f32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: # kill: def $f1 killed $f1 def $vr1
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; CHECK-NEXT: # kill: def $f0 killed $f0 def $vr0
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; CHECK-NEXT: vfsub.s $vr0, $vr0, $vr1
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; CHECK-NEXT: xvpermi.d $xr0, $xr0, 68
47+
; CHECK-NEXT: xvrepl128vei.w $xr0, $xr0, 0
48+
; CHECK-NEXT: ret
49+
entry:
50+
%insa = insertelement <8 x float> poison, float %a, i32 0
51+
%insb = insertelement <8 x float> poison, float %b, i32 0
52+
%va = shufflevector <8 x float> %insa, <8 x float> poison, <8 x i32> zeroinitializer
53+
%vb = shufflevector <8 x float> %insb, <8 x float> poison, <8 x i32> zeroinitializer
54+
%c = fsub <8 x float> %va, %vb
55+
ret <8 x float> %c
56+
}
57+
58+
define <4 x double> @fsub_splat_v4f64(double %a) nounwind {
59+
; LA32-LABEL: fsub_splat_v4f64:
60+
; LA32: # %bb.0: # %entry
61+
; LA32-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0
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; LA32-NEXT: vldi $vr1, -784
63+
; LA32-NEXT: xvfadd.d $xr0, $xr0, $xr1
64+
; LA32-NEXT: xvpermi.d $xr0, $xr0, 68
65+
; LA32-NEXT: xvrepl128vei.d $xr0, $xr0, 0
66+
; LA32-NEXT: ret
67+
;
68+
; LA64-LABEL: fsub_splat_v4f64:
69+
; LA64: # %bb.0: # %entry
70+
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0
71+
; LA64-NEXT: lu52i.d $a0, $zero, -1025
72+
; LA64-NEXT: xvreplgr2vr.d $xr1, $a0
73+
; LA64-NEXT: xvfadd.d $xr0, $xr0, $xr1
74+
; LA64-NEXT: xvpermi.d $xr0, $xr0, 68
75+
; LA64-NEXT: xvrepl128vei.d $xr0, $xr0, 0
76+
; LA64-NEXT: ret
77+
entry:
78+
%insa = insertelement <4 x double> poison, double %a, i32 0
79+
%insb = insertelement <4 x double> poison, double 1.0, i32 0
80+
%va = shufflevector <4 x double> %insa, <4 x double> poison, <4 x i32> zeroinitializer
81+
%vb = shufflevector <4 x double> %insb, <4 x double> poison, <4 x i32> zeroinitializer
82+
%c = fsub <4 x double> %va, %vb
83+
ret <4 x double> %c
84+
}
Lines changed: 73 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,73 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
2+
; RUN: llc --mtriple=loongarch32 -mattr=+32s,+lsx < %s | FileCheck %s --check-prefixes=CHECK,LA32
3+
; RUN: llc --mtriple=loongarch64 -mattr=+lsx < %s | FileCheck %s --check-prefixes=CHECK,LA64
4+
5+
define <4 x float> @fadd_elt0_v4f32(float %a) nounwind {
6+
; CHECK-LABEL: fadd_elt0_v4f32:
7+
; CHECK: # %bb.0: # %entry
8+
; CHECK-NEXT: # kill: def $f0 killed $f0 def $vr0
9+
; CHECK-NEXT: lu12i.w $a0, 260096
10+
; CHECK-NEXT: vreplgr2vr.w $vr1, $a0
11+
; CHECK-NEXT: vfadd.s $vr0, $vr0, $vr1
12+
; CHECK-NEXT: ret
13+
entry:
14+
%b = insertelement <4 x float> poison, float %a, i32 0
15+
%c = fadd <4 x float> %b, <float 1.0, float poison, float poison, float poison>
16+
ret <4 x float> %c
17+
}
18+
19+
define <2 x double> @fadd_elt0_v2f64(double %a) nounwind {
20+
; LA32-LABEL: fadd_elt0_v2f64:
21+
; LA32: # %bb.0: # %entry
22+
; LA32-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
23+
; LA32-NEXT: vldi $vr1, -912
24+
; LA32-NEXT: vfadd.d $vr0, $vr0, $vr1
25+
; LA32-NEXT: ret
26+
;
27+
; LA64-LABEL: fadd_elt0_v2f64:
28+
; LA64: # %bb.0: # %entry
29+
; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
30+
; LA64-NEXT: lu52i.d $a0, $zero, 1023
31+
; LA64-NEXT: vreplgr2vr.d $vr1, $a0
32+
; LA64-NEXT: vfadd.d $vr0, $vr0, $vr1
33+
; LA64-NEXT: ret
34+
entry:
35+
%b = insertelement <2 x double> poison, double %a, i32 0
36+
%c = fadd <2 x double> %b, <double 1.0, double poison>
37+
ret <2 x double> %c
38+
}
39+
40+
define <4 x float> @fsub_splat_v4f32(float %b) nounwind {
41+
; CHECK-LABEL: fsub_splat_v4f32:
42+
; CHECK: # %bb.0: # %entry
43+
; CHECK-NEXT: # kill: def $f0 killed $f0 def $vr0
44+
; CHECK-NEXT: lu12i.w $a0, 260096
45+
; CHECK-NEXT: vreplgr2vr.w $vr1, $a0
46+
; CHECK-NEXT: vfsub.s $vr0, $vr1, $vr0
47+
; CHECK-NEXT: vreplvei.w $vr0, $vr0, 0
48+
; CHECK-NEXT: ret
49+
entry:
50+
%insa = insertelement <4 x float> poison, float 1.0, i32 0
51+
%insb = insertelement <4 x float> poison, float %b, i32 0
52+
%va = shufflevector <4 x float> %insa, <4 x float> poison, <4 x i32> zeroinitializer
53+
%vb = shufflevector <4 x float> %insb, <4 x float> poison, <4 x i32> zeroinitializer
54+
%c = fsub <4 x float> %va, %vb
55+
ret <4 x float> %c
56+
}
57+
58+
define <2 x double> @fsub_splat_v2f64(double %a, double %b) nounwind {
59+
; CHECK-LABEL: fsub_splat_v2f64:
60+
; CHECK: # %bb.0: # %entry
61+
; CHECK-NEXT: # kill: def $f1_64 killed $f1_64 def $vr1
62+
; CHECK-NEXT: # kill: def $f0_64 killed $f0_64 def $vr0
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; CHECK-NEXT: vfsub.d $vr0, $vr0, $vr1
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; CHECK-NEXT: vreplvei.d $vr0, $vr0, 0
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; CHECK-NEXT: ret
66+
entry:
67+
%insa = insertelement <2 x double> poison, double %a, i32 0
68+
%insb = insertelement <2 x double> poison, double %b, i32 0
69+
%va = shufflevector <2 x double> %insa, <2 x double> poison, <2 x i32> zeroinitializer
70+
%vb = shufflevector <2 x double> %insb, <2 x double> poison, <2 x i32> zeroinitializer
71+
%c = fsub <2 x double> %va, %vb
72+
ret <2 x double> %c
73+
}

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