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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 |
| 2 | +; RUN: llc --mtriple=loongarch32 -mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32 |
| 3 | +; RUN: llc --mtriple=loongarch64 -mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64 |
| 4 | + |
| 5 | +define <8 x float> @fadd_elt0_v8f32(float %a) nounwind { |
| 6 | +; CHECK-LABEL: fadd_elt0_v8f32: |
| 7 | +; CHECK: # %bb.0: # %entry |
| 8 | +; CHECK-NEXT: # kill: def $f0 killed $f0 def $xr0 |
| 9 | +; CHECK-NEXT: lu12i.w $a0, 260096 |
| 10 | +; CHECK-NEXT: xvreplgr2vr.w $xr1, $a0 |
| 11 | +; CHECK-NEXT: xvfadd.s $xr0, $xr0, $xr1 |
| 12 | +; CHECK-NEXT: ret |
| 13 | +entry: |
| 14 | + %b = insertelement <8 x float> poison, float %a, i32 0 |
| 15 | + %c = fadd <8 x float> %b, <float 1.0, float poison, float poison, float poison, float poison, float poison, float poison, float poison> |
| 16 | + ret <8 x float> %c |
| 17 | +} |
| 18 | + |
| 19 | +define <4 x double> @fadd_elt0_v4f64(double %a) nounwind { |
| 20 | +; LA32-LABEL: fadd_elt0_v4f64: |
| 21 | +; LA32: # %bb.0: # %entry |
| 22 | +; LA32-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0 |
| 23 | +; LA32-NEXT: vldi $vr1, -912 |
| 24 | +; LA32-NEXT: xvfadd.d $xr0, $xr0, $xr1 |
| 25 | +; LA32-NEXT: ret |
| 26 | +; |
| 27 | +; LA64-LABEL: fadd_elt0_v4f64: |
| 28 | +; LA64: # %bb.0: # %entry |
| 29 | +; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0 |
| 30 | +; LA64-NEXT: lu52i.d $a0, $zero, 1023 |
| 31 | +; LA64-NEXT: xvreplgr2vr.d $xr1, $a0 |
| 32 | +; LA64-NEXT: xvfadd.d $xr0, $xr0, $xr1 |
| 33 | +; LA64-NEXT: ret |
| 34 | +entry: |
| 35 | + %b = insertelement <4 x double> poison, double %a, i32 0 |
| 36 | + %c = fadd <4 x double> %b, <double 1.0, double poison, double poison, double poison> |
| 37 | + ret <4 x double> %c |
| 38 | +} |
| 39 | + |
| 40 | +define <8 x float> @fsub_splat_v8f32(float %a, float %b) nounwind { |
| 41 | +; CHECK-LABEL: fsub_splat_v8f32: |
| 42 | +; CHECK: # %bb.0: # %entry |
| 43 | +; CHECK-NEXT: # kill: def $f1 killed $f1 def $vr1 |
| 44 | +; CHECK-NEXT: # kill: def $f0 killed $f0 def $vr0 |
| 45 | +; CHECK-NEXT: vfsub.s $vr0, $vr0, $vr1 |
| 46 | +; CHECK-NEXT: xvpermi.d $xr0, $xr0, 68 |
| 47 | +; CHECK-NEXT: xvrepl128vei.w $xr0, $xr0, 0 |
| 48 | +; CHECK-NEXT: ret |
| 49 | +entry: |
| 50 | + %insa = insertelement <8 x float> poison, float %a, i32 0 |
| 51 | + %insb = insertelement <8 x float> poison, float %b, i32 0 |
| 52 | + %va = shufflevector <8 x float> %insa, <8 x float> poison, <8 x i32> zeroinitializer |
| 53 | + %vb = shufflevector <8 x float> %insb, <8 x float> poison, <8 x i32> zeroinitializer |
| 54 | + %c = fsub <8 x float> %va, %vb |
| 55 | + ret <8 x float> %c |
| 56 | +} |
| 57 | + |
| 58 | +define <4 x double> @fsub_splat_v4f64(double %a) nounwind { |
| 59 | +; LA32-LABEL: fsub_splat_v4f64: |
| 60 | +; LA32: # %bb.0: # %entry |
| 61 | +; LA32-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0 |
| 62 | +; LA32-NEXT: vldi $vr1, -784 |
| 63 | +; LA32-NEXT: xvfadd.d $xr0, $xr0, $xr1 |
| 64 | +; LA32-NEXT: xvpermi.d $xr0, $xr0, 68 |
| 65 | +; LA32-NEXT: xvrepl128vei.d $xr0, $xr0, 0 |
| 66 | +; LA32-NEXT: ret |
| 67 | +; |
| 68 | +; LA64-LABEL: fsub_splat_v4f64: |
| 69 | +; LA64: # %bb.0: # %entry |
| 70 | +; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0 |
| 71 | +; LA64-NEXT: lu52i.d $a0, $zero, -1025 |
| 72 | +; LA64-NEXT: xvreplgr2vr.d $xr1, $a0 |
| 73 | +; LA64-NEXT: xvfadd.d $xr0, $xr0, $xr1 |
| 74 | +; LA64-NEXT: xvpermi.d $xr0, $xr0, 68 |
| 75 | +; LA64-NEXT: xvrepl128vei.d $xr0, $xr0, 0 |
| 76 | +; LA64-NEXT: ret |
| 77 | +entry: |
| 78 | + %insa = insertelement <4 x double> poison, double %a, i32 0 |
| 79 | + %insb = insertelement <4 x double> poison, double 1.0, i32 0 |
| 80 | + %va = shufflevector <4 x double> %insa, <4 x double> poison, <4 x i32> zeroinitializer |
| 81 | + %vb = shufflevector <4 x double> %insb, <4 x double> poison, <4 x i32> zeroinitializer |
| 82 | + %c = fsub <4 x double> %va, %vb |
| 83 | + ret <4 x double> %c |
| 84 | +} |
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