11; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2- ; RUN: opt -passes='vector-combine,dce ' -S -mtriple=aarch64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=LE
3- ; RUN: opt -passes='vector-combine,dce ' -S -mtriple=aarch64_be-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=BE
2+ ; RUN: opt -passes='vector-combine' -S -mtriple=aarch64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=LE
3+ ; RUN: opt -passes='vector-combine' -S -mtriple=aarch64_be-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=BE
44
55define i64 @g (<8 x i8 > %v ) {
66; LE-LABEL: @g(
77; LE-NEXT: [[TMP1:%.*]] = freeze <8 x i8> [[V:%.*]]
88; LE-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to i64
99; LE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 56
1010; LE-NEXT: [[TMP4:%.*]] = and i64 [[TMP2]], 255
11+ ; LE-NEXT: [[Z:%.*]] = zext <8 x i8> [[V]] to <8 x i64>
12+ ; LE-NEXT: [[E0:%.*]] = extractelement <8 x i64> [[Z]], i32 0
13+ ; LE-NEXT: [[E7:%.*]] = extractelement <8 x i64> [[Z]], i32 7
1114; LE-NEXT: [[SUM:%.*]] = add i64 [[TMP4]], [[TMP3]]
1215; LE-NEXT: ret i64 [[SUM]]
1316;
@@ -16,6 +19,9 @@ define i64 @g(<8 x i8> %v) {
1619; BE-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to i64
1720; BE-NEXT: [[TMP3:%.*]] = and i64 [[TMP2]], 255
1821; BE-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP2]], 56
22+ ; BE-NEXT: [[Z:%.*]] = zext <8 x i8> [[V]] to <8 x i64>
23+ ; BE-NEXT: [[E0:%.*]] = extractelement <8 x i64> [[Z]], i32 0
24+ ; BE-NEXT: [[E7:%.*]] = extractelement <8 x i64> [[Z]], i32 7
1925; BE-NEXT: [[SUM:%.*]] = add i64 [[TMP4]], [[TMP3]]
2026; BE-NEXT: ret i64 [[SUM]]
2127;
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