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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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- ; RUN: opt -passes='vector-combine,dce ' -S -mtriple=aarch64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=LE
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- ; RUN: opt -passes='vector-combine,dce ' -S -mtriple=aarch64_be-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=BE
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+ ; RUN: opt -passes='vector-combine' -S -mtriple=aarch64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=LE
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+ ; RUN: opt -passes='vector-combine' -S -mtriple=aarch64_be-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=BE
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define i64 @g (<8 x i8 > %v ) {
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; LE-LABEL: @g(
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; LE-NEXT: [[TMP1:%.*]] = freeze <8 x i8> [[V:%.*]]
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; LE-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to i64
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; LE-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 56
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; LE-NEXT: [[TMP4:%.*]] = and i64 [[TMP2]], 255
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+ ; LE-NEXT: [[Z:%.*]] = zext <8 x i8> [[V]] to <8 x i64>
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+ ; LE-NEXT: [[E0:%.*]] = extractelement <8 x i64> [[Z]], i32 0
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+ ; LE-NEXT: [[E7:%.*]] = extractelement <8 x i64> [[Z]], i32 7
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; LE-NEXT: [[SUM:%.*]] = add i64 [[TMP4]], [[TMP3]]
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; LE-NEXT: ret i64 [[SUM]]
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;
@@ -16,6 +19,9 @@ define i64 @g(<8 x i8> %v) {
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; BE-NEXT: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to i64
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; BE-NEXT: [[TMP3:%.*]] = and i64 [[TMP2]], 255
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; BE-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP2]], 56
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+ ; BE-NEXT: [[Z:%.*]] = zext <8 x i8> [[V]] to <8 x i64>
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+ ; BE-NEXT: [[E0:%.*]] = extractelement <8 x i64> [[Z]], i32 0
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+ ; BE-NEXT: [[E7:%.*]] = extractelement <8 x i64> [[Z]], i32 7
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; BE-NEXT: [[SUM:%.*]] = add i64 [[TMP4]], [[TMP3]]
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; BE-NEXT: ret i64 [[SUM]]
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;
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