AMDGPU: Constrain regclass when replacing SGPRs with VGPRs (#159369)

Author: arsenm

llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

@@ -8993,7 +8993,10 @@ void SIInstrInfo::addUsersToMoveToVALUWorklist(
       break;
     }
 
-    if (!RI.hasVectorRegisters(getOpRegClass(UseMI, OpNo)))
+    const TargetRegisterClass *OpRC = getOpRegClass(UseMI, OpNo);
+    MRI.constrainRegClass(DstReg, OpRC);
+
+    if (!RI.hasVectorRegisters(OpRC))
       Worklist.insert(&UseMI);
     else
       // Legalization could change user list.