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Revert "[AggressiveAntiDepBreaker] Use MCRegister. NFC"
This reverts commit fd3326b. Getting a failure on the buildbots
1 parent fd3326b commit dcca3f4

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2 files changed

+73
-79
lines changed

2 files changed

+73
-79
lines changed

‎llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp‎

Lines changed: 57 additions & 62 deletions
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,7 @@ AggressiveAntiDepState::AggressiveAntiDepState(const unsigned TargetRegs,
6767
}
6868
}
6969

70-
unsigned AggressiveAntiDepState::GetGroup(MCRegister Reg) {
70+
unsigned AggressiveAntiDepState::GetGroup(unsigned Reg) {
7171
unsigned Node = GroupNodeIndices[Reg];
7272
while (GroupNodes[Node] != Node)
7373
Node = GroupNodes[Node];
@@ -76,16 +76,17 @@ unsigned AggressiveAntiDepState::GetGroup(MCRegister Reg) {
7676
}
7777

7878
void AggressiveAntiDepState::GetGroupRegs(
79-
unsigned Group, std::vector<MCRegister> &Regs,
80-
std::multimap<MCRegister, AggressiveAntiDepState::RegisterReference>
81-
*RegRefs) {
79+
unsigned Group,
80+
std::vector<unsigned> &Regs,
81+
std::multimap<unsigned, AggressiveAntiDepState::RegisterReference> *RegRefs)
82+
{
8283
for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) {
8384
if ((GetGroup(Reg) == Group) && (RegRefs->count(Reg) > 0))
8485
Regs.push_back(Reg);
8586
}
8687
}
8788

88-
unsigned AggressiveAntiDepState::UnionGroups(MCRegister Reg1, MCRegister Reg2) {
89+
unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2) {
8990
assert(GroupNodes[0] == 0 && "GroupNode 0 not parent!");
9091
assert(GroupNodeIndices[0] == 0 && "Reg 0 not in Group 0!");
9192

@@ -100,7 +101,7 @@ unsigned AggressiveAntiDepState::UnionGroups(MCRegister Reg1, MCRegister Reg2) {
100101
return Parent;
101102
}
102103

103-
unsigned AggressiveAntiDepState::LeaveGroup(MCRegister Reg) {
104+
unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) {
104105
// Create a new GroupNode for Reg. Reg's existing GroupNode must
105106
// stay as is because there could be other GroupNodes referring to
106107
// it.
@@ -110,7 +111,7 @@ unsigned AggressiveAntiDepState::LeaveGroup(MCRegister Reg) {
110111
return idx;
111112
}
112113

113-
bool AggressiveAntiDepState::IsLive(MCRegister Reg) {
114+
bool AggressiveAntiDepState::IsLive(unsigned Reg) {
114115
// KillIndex must be defined and DefIndex not defined for a register
115116
// to be live.
116117
return((KillIndices[Reg] != ~0u) && (DefIndices[Reg] == ~0u));
@@ -172,7 +173,7 @@ void AggressiveAntiDepBreaker::StartBlock(MachineBasicBlock *BB) {
172173
if (!IsReturnBlock && !Pristine.test(Reg))
173174
continue;
174175
for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
175-
MCRegister AliasReg = *AI;
176+
unsigned AliasReg = *AI;
176177
State->UnionGroups(AliasReg, 0);
177178
KillIndices[AliasReg] = BB->size();
178179
DefIndices[AliasReg] = ~0u;
@@ -189,7 +190,7 @@ void AggressiveAntiDepBreaker::Observe(MachineInstr &MI, unsigned Count,
189190
unsigned InsertPosIndex) {
190191
assert(Count < InsertPosIndex && "Instruction index out of expected range!");
191192

192-
std::set<MCRegister> PassthruRegs;
193+
std::set<unsigned> PassthruRegs;
193194
GetPassthruRegs(MI, PassthruRegs);
194195
PrescanInstruction(MI, Count, PassthruRegs);
195196
ScanInstruction(MI, Count);
@@ -238,7 +239,7 @@ bool AggressiveAntiDepBreaker::IsImplicitDefUse(MachineInstr &MI,
238239
}
239240

240241
void AggressiveAntiDepBreaker::GetPassthruRegs(
241-
MachineInstr &MI, std::set<MCRegister> &PassthruRegs) {
242+
MachineInstr &MI, std::set<unsigned> &PassthruRegs) {
242243
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
243244
MachineOperand &MO = MI.getOperand(i);
244245
if (!MO.isReg()) continue;
@@ -287,14 +288,14 @@ static const SUnit *CriticalPathStep(const SUnit *SU) {
287288
return (Next) ? Next->getSUnit() : nullptr;
288289
}
289290

290-
void AggressiveAntiDepBreaker::HandleLastUse(MCRegister Reg, unsigned KillIdx,
291+
void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx,
291292
const char *tag,
292293
const char *header,
293294
const char *footer) {
294295
std::vector<unsigned> &KillIndices = State->GetKillIndices();
295296
std::vector<unsigned> &DefIndices = State->GetDefIndices();
296-
std::multimap<MCRegister, AggressiveAntiDepState::RegisterReference>
297-
&RegRefs = State->GetRegRefs();
297+
std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
298+
RegRefs = State->GetRegRefs();
298299

299300
// FIXME: We must leave subregisters of live super registers as live, so that
300301
// we don't clear out the register tracking information for subregisters of
@@ -340,11 +341,10 @@ void AggressiveAntiDepBreaker::HandleLastUse(MCRegister Reg, unsigned KillIdx,
340341
}
341342

342343
void AggressiveAntiDepBreaker::PrescanInstruction(
343-
MachineInstr &MI, unsigned Count,
344-
const std::set<MCRegister> &PassthruRegs) {
344+
MachineInstr &MI, unsigned Count, std::set<unsigned> &PassthruRegs) {
345345
std::vector<unsigned> &DefIndices = State->GetDefIndices();
346-
std::multimap<MCRegister, AggressiveAntiDepState::RegisterReference>
347-
&RegRefs = State->GetRegRefs();
346+
std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
347+
RegRefs = State->GetRegRefs();
348348

349349
// Handle dead defs by simulating a last-use of the register just
350350
// after the def. A dead def can occur because the def is truly
@@ -353,19 +353,17 @@ void AggressiveAntiDepBreaker::PrescanInstruction(
353353
// previous def.
354354
for (const MachineOperand &MO : MI.all_defs()) {
355355
Register Reg = MO.getReg();
356-
if (!Reg)
357-
continue;
356+
if (Reg == 0) continue;
358357

359-
HandleLastUse(Reg.asMCReg(), Count + 1, "", "\tDead Def: ", "\n");
358+
HandleLastUse(Reg, Count + 1, "", "\tDead Def: ", "\n");
360359
}
361360

362361
LLVM_DEBUG(dbgs() << "\tDef Groups:");
363362
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
364363
MachineOperand &MO = MI.getOperand(i);
365364
if (!MO.isReg() || !MO.isDef()) continue;
366365
Register Reg = MO.getReg();
367-
if (!Reg)
368-
continue;
366+
if (Reg == 0) continue;
369367

370368
LLVM_DEBUG(dbgs() << " " << printReg(Reg, TRI) << "=g"
371369
<< State->GetGroup(Reg));
@@ -384,7 +382,7 @@ void AggressiveAntiDepBreaker::PrescanInstruction(
384382
// Any aliased that are live at this point are completely or
385383
// partially defined here, so group those aliases with Reg.
386384
for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) {
387-
MCRegister AliasReg = *AI;
385+
unsigned AliasReg = *AI;
388386
if (State->IsLive(AliasReg)) {
389387
State->UnionGroups(Reg, AliasReg);
390388
LLVM_DEBUG(dbgs() << "->g" << State->GetGroup(Reg) << "(via "
@@ -406,8 +404,7 @@ void AggressiveAntiDepBreaker::PrescanInstruction(
406404
// live-ranges.
407405
for (const MachineOperand &MO : MI.all_defs()) {
408406
Register Reg = MO.getReg();
409-
if (!Reg)
410-
continue;
407+
if (Reg == 0) continue;
411408
// Ignore KILLs and passthru registers for liveness...
412409
if (MI.isKill() || (PassthruRegs.count(Reg) != 0))
413410
continue;
@@ -431,8 +428,8 @@ void AggressiveAntiDepBreaker::PrescanInstruction(
431428
void AggressiveAntiDepBreaker::ScanInstruction(MachineInstr &MI,
432429
unsigned Count) {
433430
LLVM_DEBUG(dbgs() << "\tUse Groups:");
434-
std::multimap<MCRegister, AggressiveAntiDepState::RegisterReference>
435-
&RegRefs = State->GetRegRefs();
431+
std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
432+
RegRefs = State->GetRegRefs();
436433

437434
// If MI's uses have special allocation requirement, don't allow
438435
// any use registers to be changed. Also assume all registers
@@ -460,16 +457,15 @@ void AggressiveAntiDepBreaker::ScanInstruction(MachineInstr &MI,
460457
MachineOperand &MO = MI.getOperand(i);
461458
if (!MO.isReg() || !MO.isUse()) continue;
462459
Register Reg = MO.getReg();
463-
if (!Reg)
464-
continue;
460+
if (Reg == 0) continue;
465461

466462
LLVM_DEBUG(dbgs() << " " << printReg(Reg, TRI) << "=g"
467463
<< State->GetGroup(Reg));
468464

469465
// It wasn't previously live but now it is, this is a kill. Forget
470466
// the previous live-range information and start a new live-range
471467
// for the register.
472-
HandleLastUse(Reg.asMCReg(), Count, "(last-use)");
468+
HandleLastUse(Reg, Count, "(last-use)");
473469

474470
if (Special) {
475471
LLVM_DEBUG(if (State->GetGroup(Reg) != 0) dbgs() << "->g0(alloc-req)");
@@ -491,14 +487,13 @@ void AggressiveAntiDepBreaker::ScanInstruction(MachineInstr &MI,
491487
if (MI.isKill()) {
492488
LLVM_DEBUG(dbgs() << "\tKill Group:");
493489

494-
Register FirstReg;
490+
unsigned FirstReg = 0;
495491
for (const MachineOperand &MO : MI.operands()) {
496492
if (!MO.isReg()) continue;
497493
Register Reg = MO.getReg();
498-
if (!Reg)
499-
continue;
494+
if (Reg == 0) continue;
500495

501-
if (FirstReg) {
496+
if (FirstReg != 0) {
502497
LLVM_DEBUG(dbgs() << "=" << printReg(Reg, TRI));
503498
State->UnionGroups(FirstReg, Reg);
504499
} else {
@@ -511,7 +506,7 @@ void AggressiveAntiDepBreaker::ScanInstruction(MachineInstr &MI,
511506
}
512507
}
513508

514-
BitVector AggressiveAntiDepBreaker::GetRenameRegisters(MCRegister Reg) {
509+
BitVector AggressiveAntiDepBreaker::GetRenameRegisters(unsigned Reg) {
515510
BitVector BV(TRI->getNumRegs(), false);
516511
bool first = true;
517512

@@ -537,17 +532,17 @@ BitVector AggressiveAntiDepBreaker::GetRenameRegisters(MCRegister Reg) {
537532
}
538533

539534
bool AggressiveAntiDepBreaker::FindSuitableFreeRegisters(
540-
MCRegister SuperReg, unsigned AntiDepGroupIndex,
541-
RenameOrderType &RenameOrder, std::map<MCRegister, MCRegister> &RenameMap) {
535+
unsigned SuperReg, unsigned AntiDepGroupIndex, RenameOrderType &RenameOrder,
536+
std::map<unsigned, unsigned> &RenameMap) {
542537
std::vector<unsigned> &KillIndices = State->GetKillIndices();
543538
std::vector<unsigned> &DefIndices = State->GetDefIndices();
544-
std::multimap<MCRegister, AggressiveAntiDepState::RegisterReference>
545-
&RegRefs = State->GetRegRefs();
539+
std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
540+
RegRefs = State->GetRegRefs();
546541

547542
// Collect all referenced registers in the same group as
548543
// AntiDepReg. These all need to be renamed together if we are to
549544
// break the anti-dependence.
550-
std::vector<MCRegister> Regs;
545+
std::vector<unsigned> Regs;
551546
State->GetGroupRegs(AntiDepGroupIndex, Regs, &RegRefs);
552547
assert(!Regs.empty() && "Empty register group!");
553548
if (Regs.empty())
@@ -557,8 +552,8 @@ bool AggressiveAntiDepBreaker::FindSuitableFreeRegisters(
557552
// each register.
558553
LLVM_DEBUG(dbgs() << "\tRename Candidates for Group g" << AntiDepGroupIndex
559554
<< ":\n");
560-
std::map<MCRegister, BitVector> RenameRegisterMap;
561-
for (MCRegister Reg : Regs) {
555+
std::map<unsigned, BitVector> RenameRegisterMap;
556+
for (unsigned Reg : Regs) {
562557
// If Reg has any references, then collect possible rename regs
563558
if (RegRefs.count(Reg) > 0) {
564559
LLVM_DEBUG(dbgs() << "\t\t" << printReg(Reg, TRI) << ":");
@@ -577,7 +572,7 @@ bool AggressiveAntiDepBreaker::FindSuitableFreeRegisters(
577572
}
578573

579574
// All group registers should be a subreg of SuperReg.
580-
for (MCRegister Reg : Regs) {
575+
for (unsigned Reg : Regs) {
581576
if (Reg == SuperReg) continue;
582577
bool IsSub = TRI->isSubRegister(SuperReg, Reg);
583578
// FIXME: remove this once PR18663 has been properly fixed. For now,
@@ -626,7 +621,7 @@ bool AggressiveAntiDepBreaker::FindSuitableFreeRegisters(
626621
do {
627622
if (R == 0) R = Order.size();
628623
--R;
629-
const MCRegister NewSuperReg = Order[R];
624+
const unsigned NewSuperReg = Order[R];
630625
// Don't consider non-allocatable registers
631626
if (!MRI.isAllocatable(NewSuperReg)) continue;
632627
// Don't replace a register with itself.
@@ -638,8 +633,8 @@ bool AggressiveAntiDepBreaker::FindSuitableFreeRegisters(
638633
// For each referenced group register (which must be a SuperReg or
639634
// a subregister of SuperReg), find the corresponding subregister
640635
// of NewSuperReg and make sure it is free to be renamed.
641-
for (MCRegister Reg : Regs) {
642-
MCRegister NewReg;
636+
for (unsigned Reg : Regs) {
637+
unsigned NewReg = 0;
643638
if (Reg == SuperReg) {
644639
NewReg = NewSuperReg;
645640
} else {
@@ -666,7 +661,7 @@ bool AggressiveAntiDepBreaker::FindSuitableFreeRegisters(
666661
} else {
667662
bool found = false;
668663
for (MCRegAliasIterator AI(NewReg, TRI, false); AI.isValid(); ++AI) {
669-
MCRegister AliasReg = *AI;
664+
unsigned AliasReg = *AI;
670665
if (State->IsLive(AliasReg) ||
671666
(KillIndices[Reg] > DefIndices[AliasReg])) {
672667
LLVM_DEBUG(dbgs()
@@ -708,7 +703,7 @@ bool AggressiveAntiDepBreaker::FindSuitableFreeRegisters(
708703
}
709704

710705
// Record that 'Reg' can be renamed to 'NewReg'.
711-
RenameMap.insert(std::make_pair(Reg, NewReg));
706+
RenameMap.insert(std::pair<unsigned, unsigned>(Reg, NewReg));
712707
}
713708

714709
// If we fall-out here, then every register in the group can be
@@ -738,8 +733,8 @@ unsigned AggressiveAntiDepBreaker::BreakAntiDependencies(
738733
DbgValueVector &DbgValues) {
739734
std::vector<unsigned> &KillIndices = State->GetKillIndices();
740735
std::vector<unsigned> &DefIndices = State->GetDefIndices();
741-
std::multimap<MCRegister, AggressiveAntiDepState::RegisterReference>
742-
&RegRefs = State->GetRegRefs();
736+
std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
737+
RegRefs = State->GetRegRefs();
743738

744739
// The code below assumes that there is at least one instruction,
745740
// so just duck out immediately if the block is empty.
@@ -797,7 +792,7 @@ unsigned AggressiveAntiDepBreaker::BreakAntiDependencies(
797792
LLVM_DEBUG(dbgs() << "Anti: ");
798793
LLVM_DEBUG(MI.dump());
799794

800-
std::set<MCRegister> PassthruRegs;
795+
std::set<unsigned> PassthruRegs;
801796
GetPassthruRegs(MI, PassthruRegs);
802797

803798
// Process the defs in MI...
@@ -829,15 +824,15 @@ unsigned AggressiveAntiDepBreaker::BreakAntiDependencies(
829824
if ((Edge->getKind() != SDep::Anti) &&
830825
(Edge->getKind() != SDep::Output)) continue;
831826

832-
MCRegister AntiDepReg = MCRegister::from(Edge->getReg());
827+
unsigned AntiDepReg = Edge->getReg();
833828
LLVM_DEBUG(dbgs() << "\tAntidep reg: " << printReg(AntiDepReg, TRI));
834-
assert(AntiDepReg && "Anti-dependence on reg0?");
829+
assert(AntiDepReg != 0 && "Anti-dependence on reg0?");
835830

836831
if (!MRI.isAllocatable(AntiDepReg)) {
837832
// Don't break anti-dependencies on non-allocatable registers.
838833
LLVM_DEBUG(dbgs() << " (non-allocatable)\n");
839834
continue;
840-
} else if (ExcludeRegs && ExcludeRegs->test(AntiDepReg.id())) {
835+
} else if (ExcludeRegs && ExcludeRegs->test(AntiDepReg)) {
841836
// Don't break anti-dependencies for critical path registers
842837
// if not on the critical path
843838
LLVM_DEBUG(dbgs() << " (not critical-path)\n");
@@ -872,30 +867,30 @@ unsigned AggressiveAntiDepBreaker::BreakAntiDependencies(
872867
Pred.getReg() != AntiDepReg)
873868
: (Pred.getKind() == SDep::Data &&
874869
Pred.getReg() == AntiDepReg)) {
875-
AntiDepReg = MCRegister();
870+
AntiDepReg = 0;
876871
break;
877872
}
878873
}
879874
for (const SDep &Pred : PathSU->Preds) {
880875
if ((Pred.getSUnit() == NextSU) && (Pred.getKind() != SDep::Anti) &&
881876
(Pred.getKind() != SDep::Output)) {
882877
LLVM_DEBUG(dbgs() << " (real dependency)\n");
883-
AntiDepReg = MCRegister();
878+
AntiDepReg = 0;
884879
break;
885880
} else if ((Pred.getSUnit() != NextSU) &&
886881
(Pred.getKind() == SDep::Data) &&
887882
(Pred.getReg() == AntiDepReg)) {
888883
LLVM_DEBUG(dbgs() << " (other dependency)\n");
889-
AntiDepReg = MCRegister();
884+
AntiDepReg = 0;
890885
break;
891886
}
892887
}
893888

894-
if (!AntiDepReg)
889+
if (AntiDepReg == 0)
895890
continue;
896891
}
897892

898-
assert(AntiDepReg);
893+
assert(AntiDepReg != 0);
899894

900895
// Determine AntiDepReg's register group.
901896
const unsigned GroupIndex = State->GetGroup(AntiDepReg);
@@ -907,16 +902,16 @@ unsigned AggressiveAntiDepBreaker::BreakAntiDependencies(
907902
LLVM_DEBUG(dbgs() << '\n');
908903

909904
// Look for a suitable register to use to break the anti-dependence.
910-
std::map<MCRegister, MCRegister> RenameMap;
905+
std::map<unsigned, unsigned> RenameMap;
911906
if (FindSuitableFreeRegisters(AntiDepReg, GroupIndex, RenameOrder,
912907
RenameMap)) {
913908
LLVM_DEBUG(dbgs() << "\tBreaking anti-dependence edge on "
914909
<< printReg(AntiDepReg, TRI) << ":");
915910

916911
// Handle each group register...
917912
for (const auto &P : RenameMap) {
918-
MCRegister CurrReg = P.first;
919-
MCRegister NewReg = P.second;
913+
unsigned CurrReg = P.first;
914+
unsigned NewReg = P.second;
920915

921916
LLVM_DEBUG(dbgs() << " " << printReg(CurrReg, TRI) << "->"
922917
<< printReg(NewReg, TRI) << "("

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