We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
udef
1 parent 8c0f604 commit e190b12Copy full SHA for e190b12
llvm/test/CodeGen/LoongArch/inline-asm-constraint-q.ll
@@ -15,7 +15,7 @@ define i32 @constraint_q_not_r1(i32 %0) {
15
; CHECK-NOT: csrxchg ${{[a-z]*}}, $r1, 0
16
; CHECK-NOT: csrxchg ${{[a-z]*}}, $ra, 0
17
entry:
18
- %2 = tail call i32 asm "", "={$r1},{$r1}"(i32 undef)
+ %2 = tail call i32 asm "", "={$r1},{$r1}"(i32 0)
19
%3 = tail call i32 asm "csrxchg $0, $1, 0", "=r,q,0"(i32 %2, i32 %0)
20
ret i32 %3
21
}
0 commit comments