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Make sure that V_CND_MASK gets handled
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3 files changed

+57
-2
lines changed

3 files changed

+57
-2
lines changed

llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1101,7 +1101,8 @@ void SIPeepholeSDWA::convertVcndmaskToVOP2(MachineInstr &MI,
11011101

11021102
// Change destination of compare instruction to VCC
11031103
// or copy to VCC if carry-in is not a compare inst.
1104-
if (CarryDef->isCompare() && TII->isVOP3(*CarryDef) &&
1104+
if (TII->isVOP3(*CarryDef) &&
1105+
TII->isVOPC(AMDGPU::getVOPe32(CarryDef->getOpcode())) &&
11051106
MRI->hasOneUse(CarryIn.getReg()))
11061107
CarryDef->substituteRegister(CarryIn.getReg(), Vcc, 0, *TRI);
11071108
else {

llvm/test/CodeGen/AMDGPU/sdwa-peephole-cndmask-vop3-wave32.mir

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,33 @@ body: |
2828
SI_RETURN implicit $vgpr0
2929
...
3030

31+
---
32+
name: change-compare-class-to-vopc # check that non-compare instr V_CMP_CLASS is also handled
33+
tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: change-compare-class-to-vopc
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; CHECK: liveins: $vgpr0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_32_xm0_xexec = IMPLICIT_DEF
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; CHECK-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
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; CHECK-NEXT: $vcc_lo = V_CMP_CLASS_F32_e64 2, undef [[DEF]], 1, implicit $exec
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; CHECK-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 16, undef [[DEF1]], implicit $exec
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; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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; CHECK-NEXT: [[V_CNDMASK_B32_sdwa:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_sdwa 0, [[V_MOV_B32_e32_]], 0, undef [[DEF1]], 0, 6, 0, 6, 5, implicit $vcc_lo, implicit $exec
47+
; CHECK-NEXT: $vgpr0 = COPY [[V_CNDMASK_B32_sdwa]]
48+
; CHECK-NEXT: SI_RETURN implicit $vgpr0
49+
%0:sreg_32_xm0_xexec = IMPLICIT_DEF
50+
%1:vgpr_32 = IMPLICIT_DEF
51+
%2:sreg_32_xm0_xexec = V_CMP_CLASS_F32_e64 2, undef %0, 1, implicit $exec
52+
%3:vgpr_32 = V_LSHRREV_B32_e64 16, undef %1, implicit $exec
53+
%4:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %3, killed %2, implicit $exec
54+
$vgpr0 = COPY %4
55+
SI_RETURN implicit $vgpr0
56+
...
57+
3158
...
3259
---
3360
name: carry-copy-non-compare # copy of carry-in necessary because def. instr. cannot be changed to write to VCC

llvm/test/CodeGen/AMDGPU/sdwa-peephole-cndmask-vop3-wave64.mir

Lines changed: 28 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
1-
# RUN: llc %s -mtriple=amdgcn -mcpu=gfx900 -run-pass=si-peephole-sdwa -o - | FileCheck %s
21
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
2+
# RUN: llc %s -mtriple=amdgcn -mcpu=gfx900 -run-pass=si-peephole-sdwa -o - | FileCheck %s
33

44
---
55
name: change-compare-to-vopc # carry-in def is a comparison that can be changed to VOPC
@@ -28,6 +28,33 @@ body: |
2828
SI_RETURN implicit $vgpr0
2929
...
3030

31+
---
32+
name: change-compare-class-to-vopc # check that non-compare instr V_CMP_CLASS is also handled
33+
tracksRegLiveness: true
34+
body: |
35+
bb.0:
36+
liveins: $vgpr0
37+
38+
; CHECK-LABEL: name: change-compare-class-to-vopc
39+
; CHECK: liveins: $vgpr0
40+
; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_32_xm0_xexec = IMPLICIT_DEF
42+
; CHECK-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
43+
; CHECK-NEXT: $vcc = V_CMP_CLASS_F32_e64 2, undef [[DEF]], 1, implicit $exec
44+
; CHECK-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 16, undef [[DEF1]], implicit $exec
45+
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
46+
; CHECK-NEXT: [[V_CNDMASK_B32_sdwa:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_sdwa 0, [[V_MOV_B32_e32_]], 0, undef [[DEF1]], 0, 6, 0, 6, 5, implicit $vcc, implicit $exec
47+
; CHECK-NEXT: $vgpr0 = COPY [[V_CNDMASK_B32_sdwa]]
48+
; CHECK-NEXT: SI_RETURN implicit $vgpr0
49+
%0:sreg_32_xm0_xexec = IMPLICIT_DEF
50+
%1:vgpr_32 = IMPLICIT_DEF
51+
%2:sreg_64_xexec = V_CMP_CLASS_F32_e64 2, undef %0, 1, implicit $exec
52+
%3:vgpr_32 = V_LSHRREV_B32_e64 16, undef %1, implicit $exec
53+
%4:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, %3, killed %2, implicit $exec
54+
$vgpr0 = COPY %4
55+
SI_RETURN implicit $vgpr0
56+
...
57+
3158
...
3259
---
3360
name: carry-copy-non-compare # copy of carry-in necessary because def. instr. cannot be changed to write to VCC

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