@@ -343,35 +343,33 @@ Register SPIRVGlobalRegistry::createConstFP(const ConstantFP *CF,
343343 return Res;
344344}
345345
346- Register SPIRVGlobalRegistry::getOrCreateConstInt (APInt Val, MachineInstr &I,
346+ Register SPIRVGlobalRegistry::getOrCreateConstInt (const APInt Val, MachineInstr &I,
347347 SPIRVType *SpvType,
348348 const SPIRVInstrInfo &TII,
349349 bool ZeroAsNull) {
350350 const IntegerType *Ty = cast<IntegerType>(getTypeForSPIRVType (SpvType));
351- auto *const CI = ConstantInt::get (const_cast <IntegerType *>(Ty), Val);
352- const MachineInstr *MI = findMI (CI , CurMF);
351+ Constant *const CA = ConstantInt::get (const_cast <IntegerType *>(Ty), Val);
352+ const MachineInstr *MI = findMI (CA , CurMF);
353353 if (MI && (MI->getOpcode () == SPIRV::OpConstantNull ||
354354 MI->getOpcode () == SPIRV::OpConstantI))
355355 return MI->getOperand (0 ).getReg ();
356- return createConstInt (CI, I, SpvType, TII, ZeroAsNull);
357- LLVMContext &Ctx = CurMF->getFunction ().getContext ();
356+ return createConstInt (CA, I, SpvType, TII, ZeroAsNull);
358357}
359358
360359Register SPIRVGlobalRegistry::getOrCreateConstInt (uint64_t Val, MachineInstr &I,
361360 SPIRVType *SpvType,
362361 const SPIRVInstrInfo &TII,
363362 bool ZeroAsNull) {
364363 const IntegerType *Ty = cast<IntegerType>(getTypeForSPIRVType (SpvType));
365- auto *const CI = ConstantInt::get (const_cast <IntegerType *>(Ty), Val);
364+ ConstantInt *const CI = ConstantInt::get (const_cast <IntegerType *>(Ty), Val);
366365 const MachineInstr *MI = findMI (CI, CurMF);
367366 if (MI && (MI->getOpcode () == SPIRV::OpConstantNull ||
368367 MI->getOpcode () == SPIRV::OpConstantI))
369368 return MI->getOperand (0 ).getReg ();
370369 return createConstInt (CI, I, SpvType, TII, ZeroAsNull);
371- LLVMContext &Ctx = CurMF->getFunction ().getContext ();
372370}
373371
374- Register SPIRVGlobalRegistry::createConstInt (const Constant *CI ,
372+ Register SPIRVGlobalRegistry::createConstInt (const Constant *CA ,
375373 MachineInstr &I,
376374 SPIRVType *SpvType,
377375 const SPIRVInstrInfo &TII,
@@ -389,19 +387,19 @@ Register SPIRVGlobalRegistry::createConstInt(const Constant *CI,
389387 MachineInstrBuilder MIB;
390388 if (BitWidth == 1 ) {
391389 MIB = MIRBuilder
392- .buildInstr (CI ->isZeroValue () ? SPIRV::OpConstantFalse
390+ .buildInstr (CA ->isZeroValue () ? SPIRV::OpConstantFalse
393391 : SPIRV::OpConstantTrue)
394392 .addDef (Res)
395393 .addUse (getSPIRVTypeID (SpvType));
396- } else if (!CI ->isZeroValue () || !ZeroAsNull) {
394+ } else if (!CA ->isZeroValue () || !ZeroAsNull) {
397395 MIB = MIRBuilder.buildInstr (SPIRV::OpConstantI)
398396 .addDef (Res)
399397 .addUse (getSPIRVTypeID (SpvType));
400398 if (BitWidth <= 64 ) {
401- const ConstantInt *CII = dyn_cast<ConstantInt>(CI );
402- addNumImm (APInt (BitWidth, CII ->getZExtValue ()), MIB);
399+ const ConstantInt *CI = dyn_cast<ConstantInt>(CA );
400+ addNumImm (APInt (BitWidth, CI ->getZExtValue ()), MIB);
403401 } else {
404- addNumImm (CI ->getUniqueInteger (), MIB);
402+ addNumImm (CA ->getUniqueInteger (), MIB);
405403 }
406404 } else {
407405 MIB = MIRBuilder.buildInstr (SPIRV::OpConstantNull)
@@ -414,7 +412,7 @@ Register SPIRVGlobalRegistry::createConstInt(const Constant *CI,
414412 *ST.getRegBankInfo ());
415413 return MIB;
416414 });
417- add (CI , NewType);
415+ add (CA , NewType);
418416 return Res;
419417}
420418
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