@@ -78,6 +78,8 @@ include "llvm/Target/Target.td"
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// ASMMATCHER: if (Operand.isReg()) {
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// ASMMATCHER: static const MatchEntry MatchTable0[] = {
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+ // ASMMATCHER: /* also_my_load_1 */, MyTarget::MY_LOAD, Convert__RegByHwMode_XRegs_EvenIfRequired1_0__Imm1_1, AMFBS_None, { MCK_RegByHwMode_XRegs_EvenIfRequired, MCK_Imm }, },
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+ // ASMMATCHER: /* also_my_load_2 */, MyTarget::MY_LOAD, Convert__RegByHwMode_XRegs_EvenIfRequired1_0__Imm1_1, AMFBS_None, { MCK_RegByHwMode_XRegs_EvenIfRequired, MCK_Imm }, },
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// ASMMATCHER: /* always_all */, MyTarget::ALWAYS_ALL, Convert__Reg1_0, AMFBS_None, { MCK_XRegs }, },
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// ASMMATCHER: /* always_even */, MyTarget::ALWAYS_EVEN, Convert__Reg1_0, AMFBS_None, { MCK_XRegs_Even }, },
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// ASMMATCHER: /* custom_decode */, MyTarget::CUSTOM_DECODE, Convert__RegByHwMode_YRegs_EvenIfRequired1_0, AMFBS_None, { MCK_RegByHwMode_YRegs_EvenIfRequired }, },
@@ -412,6 +414,13 @@ def MY_LOAD : TestInstruction {
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let opcode = 6;
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}
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+ // Direct RegClassByHwMode reference
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+ def MY_LOAD_ALIAS1 : InstAlias<"also_my_load_1 $dst, $src",
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+ (MY_LOAD XRegs_EvenIfRequired:$dst, MyPtrRC:$src)>;
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+
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+ // RegClassByHwMode wrapped in RegisterOperand
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+ def MY_LOAD_ALIAS2 : InstAlias<"also_my_load_2 $dst, $src",
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+ (MY_LOAD RegisterOperand<XRegs_EvenIfRequired>:$dst, PtrRegOperand:$src)>;
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// Direct RegClassByHwMode usage
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def : Pat<
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