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Refactor evalPshufBuiltin for clarity and consistency
1 parent 1d54eeb commit ffa0287

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+12
-17
lines changed

1 file changed

+12
-17
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clang/lib/AST/ExprConstant.cpp

Lines changed: 12 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -11615,25 +11615,26 @@ static bool evalPackBuiltin(const CallExpr *E, EvalInfo &Info, APValue &Result,
1161511615
return true;
1161611616
}
1161711617

11618-
1161911618
static bool evalPshufBuiltin(EvalInfo &Info, const CallExpr *Call,
1162011619
unsigned ElemBits, unsigned HalfBase,
1162111620
APValue &Out) {
11622-
// Expect (vec, imm8)
1162311621
APValue Vec;
1162411622
APSInt Imm;
11625-
if (!EvaluateAsRValue(Info, Call->getArg(0), Vec)) return false;
11626-
if (!EvaluateInteger(Call->getArg(1), Imm, Info)) return false;
11623+
if (!EvaluateAsRValue(Info, Call->getArg(0), Vec))
11624+
return false;
11625+
if (!EvaluateInteger(Call->getArg(1), Imm, Info))
11626+
return false;
1162711627

1162811628
const auto *VT = Call->getType()->getAs<VectorType>();
11629-
if (!VT) return false;
11629+
if (!VT)
11630+
return false;
1163011631
unsigned NumElts = VT->getNumElements();
1163111632

11632-
// Lane geometry: MMX pshufw is a single 64-bit lane; others use 128-bit lanes.
1163311633
unsigned TotalBits = NumElts * ElemBits;
11634-
unsigned LaneBits = (TotalBits == 64) ? 64u : 128u;
11635-
unsigned LaneElts = LaneBits / ElemBits;
11636-
if (!LaneElts || (NumElts % LaneElts) != 0) return false;
11634+
unsigned LaneBits = (TotalBits == 64) ? 64u : 128u;
11635+
unsigned LaneElts = LaneBits / ElemBits;
11636+
if (!LaneElts || (NumElts % LaneElts) != 0)
11637+
return false;
1163711638

1163811639
uint8_t ctl = static_cast<uint8_t>(Imm.getZExtValue());
1163911640

@@ -11642,31 +11643,25 @@ static bool evalPshufBuiltin(EvalInfo &Info, const CallExpr *Call,
1164211643

1164311644
for (unsigned idx = 0; idx != NumElts; idx++) {
1164411645
unsigned LaneBase = (idx / LaneElts) * LaneElts;
11645-
unsigned LaneIdx = idx % LaneElts;
11646+
unsigned LaneIdx = idx % LaneElts;
1164611647

11647-
unsigned SrcIdx = idx;
11648+
unsigned SrcIdx = idx;
1164811649

1164911650
if (ElemBits == 32) {
11650-
// PSHUFD: permute 4×i32 per 128-bit lane
1165111651
unsigned sel = (ctl >> (2 * LaneIdx)) & 0x3;
1165211652
SrcIdx = LaneBase + sel;
1165311653
} else {
11654-
// elemBits == 16 (PSHUFLW / PSHUFHW / PSHUFW)
1165511654
if (LaneElts == 4) {
11656-
// MMX PSHUFW: permute entire 64-bit lane (4×i16)
1165711655
unsigned sel = (ctl >> (2 * LaneIdx)) & 0x3;
1165811656
SrcIdx = LaneBase + sel;
1165911657
} else {
11660-
// SSE/AVX/AVX-512: 128-bit lane has 8×i16. Permute a 4×i16 half.
1166111658
constexpr unsigned HalfSize = 4;
1166211659
if (HalfBase == 0) {
11663-
// PSHUFLW: permute low half (words 0..3)
1166411660
if (LaneIdx < HalfSize) {
1166511661
unsigned sel = (ctl >> (2 * LaneIdx)) & 0x3;
1166611662
SrcIdx = LaneBase + sel;
1166711663
}
1166811664
} else if (HalfBase == HalfSize) {
11669-
// PSHUFHW: permute high half (words 4..7)
1167011665
if (LaneIdx >= HalfSize) {
1167111666
unsigned rel = LaneIdx - HalfSize;
1167211667
unsigned sel = (ctl >> (2 * rel)) & 0x3;

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