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@r41k0u r41k0u commented Aug 19, 2025

The code is taken from SelectionDAG::computeKnownBits.
This ticks off ABS from #150515

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llvmbot commented Aug 19, 2025

@llvm/pr-subscribers-backend-amdgpu
@llvm/pr-subscribers-backend-aarch64

@llvm/pr-subscribers-llvm-globalisel

Author: Pragyansh Chaturvedi (r41k0u)

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The code is taken from SelectionDAG::computeKnownBits.
This ticks off ABS from #150515


Full diff: https://github.com/llvm/llvm-project/pull/154413.diff

1 Files Affected:

  • (modified) llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp (+8)
diff --git a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
index 974fc40de6222..df1b325fa5baf 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
@@ -697,6 +697,14 @@ void GISelValueTracking::computeKnownBitsImpl(Register R, KnownBits &Known,
     }
     break;
   }
+  case TargetOpcode::G_ABS: {
+    Register SrcReg = MI.getOperand(1).getReg();
+    computeKnownBitsImpl(SrcReg, Known, DemandedElts, Depth + 1);
+    Known = Known.abs();
+    Known.Zero.setHighBits(computeNumSignBits(SrcReg, DemandedElts, Depth + 1) -
+                           1);
+    break;
+  }
   }
 
   LLVM_DEBUG(dumpResult(MI, Known, Depth));

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r41k0u commented Aug 19, 2025

I ran the tests and found no new regressions. I am not sure how to add tests for this (as I saw in other PRs attached to the issue). I came across update_givaluetracking_test_checks.py as the test files in other PRs seem generated. If they are required, please point me towards a test writing guide and I'll add them to this PR as well.

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arsenm commented Aug 19, 2025

I ran the tests and found no new regressions. I am not sure how to add tests for this (as I saw in other PRs attached to the issue). I came across update_givaluetracking_test_checks.py as the test files in other PRs seem generated.

The output is generated, the input is not. That's a new style to directly check the output. The older style is to write the simplest code that will optimize or not based on the analysis

If they are required, please point me towards a test writing guide and I'll add them to this PR as well.

https://llvm.org/docs/TestingGuide.html#generating-assertions-in-regression-tests

You're probably best off copy-pasting one of the tests from the recent GIValueTracking commits as a starting point

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r41k0u commented Aug 23, 2025

Hi @davemgreen, I've added a couple of tests for this. Please lmk if more of them are needed.
I also goofed up by not creating a new branch for this PR, so once this is approved I'll rebase this against main.

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r41k0u commented Sep 1, 2025

I came across another issue while working on this, I will add a fix for that (and I must add a sign extension test case as well).

@r41k0u r41k0u changed the title [GlobalISel] Add G_ABS computeKnownBits [GlobalISel] Add G_ABS computeKnownBits, add ComputeKnownBitsCache assertion to computeNumSignBits Sep 1, 2025
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r41k0u commented Sep 1, 2025

I have added more tests and a fix for the cache assertion. If you think I should move it to GISelValueTrackingPrinterPass::run, something like this:

assert(VTA.ComputeKnownBitsCache.empty() && "Cache should have been cleared");
KnownBits Known = VTA.getKnownBits(Reg);
unsigned SignedBits = VTA.computeNumSignBits(Reg);
ComputeKnownBitsCache.clear();

instead of what I have done right now, please let me know and I'll change it.

@r41k0u r41k0u requested a review from arsenm September 1, 2025 10:56
@r41k0u r41k0u requested a review from davemgreen September 3, 2025 08:00
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github-actions bot commented Sep 5, 2025

✅ With the latest revision this PR passed the C/C++ code formatter.

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Thanks - It looks like there is another one that goes computeNumSignBitsImpl -> getValidMinimumShiftAmount -> getValidShiftAmountRange -> getKnownBits.

I'm wondering if it makes sense to keep the cache, or whether it is doing more harm than good. I tried checking the compile time and it wasn't very useful (although the hit rate was relatively good). I will try and put up a patch that removes it and see what people think.

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r41k0u commented Sep 7, 2025

The cache assertion in getKnownBits looks like a temporary thing until the function is fleshed out (although you'd know more about this). And since it is being added to computeNumSignBits as well, I wonder if that function can benefit from the cache somehow as well.

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I put up #157352 to see what people think of removing it.

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r41k0u commented Sep 19, 2025

Thanks. This is much more concise now. I have rebased over main and removed the cache related changes

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Thank you, LGTM.

The title could do with an update now, otherwise are you happy for this to be submitted?

@r41k0u r41k0u changed the title [GlobalISel] Add G_ABS computeKnownBits, add computeNumSignBitsImpl to work ComputeKnownBitsCache assertions [GlobalISel] Add G_ABS computeKnownBits Sep 19, 2025
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r41k0u commented Sep 19, 2025

Yes, edited the title.

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Thanks - it looks like there might be some AMD tests that need to be updated again?

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r41k0u commented Sep 20, 2025

My bad, I was only checking on some arches. Did a full build for all tests, and have updated the AMDGPU ones

@r41k0u r41k0u requested a review from davemgreen September 21, 2025 05:41
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Thanks. LGTM. Looks like it makes a nice improvement.

@davemgreen davemgreen merged commit a46edff into llvm:main Sep 21, 2025
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ckoparkar added a commit to ckoparkar/llvm-project that referenced this pull request Sep 23, 2025
* main: (1562 commits)
  Document Policy on supporting newer C++ standard in LLVM codebase (llvm#156823)
  [MLIR][Transform][SMT] Introduce transform.smt.constrain_params (llvm#159450)
  Reapply "[compiler-rt] Remove %T from shared object substitutions (llvm#155302)"
  [NFC] [IndVarSimplify] Add non-overflowing usub test (llvm#159683)
  [Github] Remove separate tools checkout from pr-code workflows (llvm#159967)
  [clang] fix using enum redecl in template regression (llvm#159996)
  [DAG] Skip `mstore` combine for `<1 x ty>` vectors (llvm#159915)
  [mlir] Expose optional `PatternBenefit` to `func` populate functions (NFC) (llvm#159986)
  [LV] Set correct costs for interleave group members.
  [clang] ast-dump: use template pattern for `instantiated_from` (llvm#159952)
  [ARM] ha-alignstack-call.ll - regenerate test checks (llvm#159988)
  [LLD][MachO] Silence warning when building with MSVC
  [llvm][Analysis] Silence warning when building with MSVC
  [LV] Skip select cost for invariant divisors in legacy cost model.
  [Clang] Fix an error-recovery crash after d1a80de (llvm#159976)
  [VPlanPatternMatch] Introduce m_ConstantInt (llvm#159558)
  [GlobalISel] Add G_ABS computeKnownBits (llvm#154413)
  [gn build] Port 4cabd1e
  Reland "[clangd] Add feature modules registry" (llvm#154836)
  [LV] Also handle non-uniform scalarized loads when processing AddrDefs.
  ...
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