[Hexagon] Add missing ELFYAML ISA/processor versions #163824
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@llvm/pr-subscribers-objectyaml Author: None (quic-areg) ChangesFull diff: https://github.com/llvm/llvm-project/pull/163824.diff 1 Files Affected:
diff --git a/llvm/lib/ObjectYAML/ELFYAML.cpp b/llvm/lib/ObjectYAML/ELFYAML.cpp
index 421d6603c08c3..68c8ff5b4eb87 100644
--- a/llvm/lib/ObjectYAML/ELFYAML.cpp
+++ b/llvm/lib/ObjectYAML/ELFYAML.cpp
@@ -488,6 +488,7 @@ void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
BCaseMask(EF_HEXAGON_MACH_V5, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V55, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V60, EF_HEXAGON_MACH);
+ BCaseMask(EF_HEXAGON_MACH_V61, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V62, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V65, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V66, EF_HEXAGON_MACH);
@@ -499,12 +500,20 @@ void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
BCaseMask(EF_HEXAGON_MACH_V71T, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V73, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_MACH_V75, EF_HEXAGON_MACH);
+ BCaseMask(EF_HEXAGON_MACH_V77, EF_HEXAGON_MACH);
+ BCaseMask(EF_HEXAGON_MACH_V79, EF_HEXAGON_MACH);
+ BCaseMask(EF_HEXAGON_MACH_V81, EF_HEXAGON_MACH);
+ BCaseMask(EF_HEXAGON_MACH_V83, EF_HEXAGON_MACH);
+ BCaseMask(EF_HEXAGON_MACH_V85, EF_HEXAGON_MACH);
+ BCaseMask(EF_HEXAGON_MACH_V87, EF_HEXAGON_MACH);
+ BCaseMask(EF_HEXAGON_MACH_V89, EF_HEXAGON_MACH);
BCaseMask(EF_HEXAGON_ISA_V2, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V3, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V4, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V5, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V55, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V60, EF_HEXAGON_ISA);
+ BCaseMask(EF_HEXAGON_ISA_V61, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V62, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V65, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V66, EF_HEXAGON_ISA);
@@ -514,6 +523,13 @@ void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
BCaseMask(EF_HEXAGON_ISA_V71, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V73, EF_HEXAGON_ISA);
BCaseMask(EF_HEXAGON_ISA_V75, EF_HEXAGON_ISA);
+ BCaseMask(EF_HEXAGON_ISA_V77, EF_HEXAGON_ISA);
+ BCaseMask(EF_HEXAGON_ISA_V79, EF_HEXAGON_ISA);
+ BCaseMask(EF_HEXAGON_ISA_V81, EF_HEXAGON_ISA);
+ BCaseMask(EF_HEXAGON_ISA_V83, EF_HEXAGON_ISA);
+ BCaseMask(EF_HEXAGON_ISA_V85, EF_HEXAGON_ISA);
+ BCaseMask(EF_HEXAGON_ISA_V87, EF_HEXAGON_ISA);
+ BCaseMask(EF_HEXAGON_ISA_V89, EF_HEXAGON_ISA);
break;
case ELF::EM_AVR:
BCaseMask(EF_AVR_ARCH_AVR1, EF_AVR_ARCH_MASK);
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androm3da
approved these changes
Oct 16, 2025
iajbar
approved these changes
Oct 16, 2025
|
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/154/builds/22800 Here is the relevant piece of the build log for the reference |
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