[Hexagon] Define V91 ISA and Processor versions in ELF flags

[quic-areg]

These versions are not supported by upstream LLVM but are needed to add support in the eld linker.

[llvmbot]

@llvm/pr-subscribers-objectyaml

@llvm/pr-subscribers-llvm-binary-utilities

Author: None (quic-areg)

Changes

These versions are not supported by upstream LLVM but are needed to add support in the eld linker.

---

Full diff: https://github.com/llvm/llvm-project/pull/163631.diff

1 Files Affected:

• (modified) llvm/include/llvm/BinaryFormat/ELF.h (+2)

diff --git a/llvm/include/llvm/BinaryFormat/ELF.h b/llvm/include/llvm/BinaryFormat/ELF.h
index e619b186dfe3d..8d0dc64199ebf 100644
--- a/llvm/include/llvm/BinaryFormat/ELF.h
+++ b/llvm/include/llvm/BinaryFormat/ELF.h
@@ -647,6 +647,7 @@ enum {
   EF_HEXAGON_ISA_V85 = 0x00000085,  // Hexagon V85 ISA
   EF_HEXAGON_ISA_V87 = 0x00000087,  // Hexagon V87 ISA
   EF_HEXAGON_ISA_V89 = 0x00000089,  // Hexagon V89 ISA
+  EF_HEXAGON_ISA_V91 = 0x00000091,  // Hexagon V91 ISA
   EF_HEXAGON_ISA = 0x000003ff,      // Hexagon V.. ISA
 
   // Tiny core flag, bit[15]
@@ -680,6 +681,7 @@ enum {
   EF_HEXAGON_MACH_V85 = EF_HEXAGON_ISA_V85,      // Hexagon V85
   EF_HEXAGON_MACH_V87 = EF_HEXAGON_ISA_V87,      // Hexagon V87
   EF_HEXAGON_MACH_V89 = EF_HEXAGON_ISA_V89,      // Hexagon V89
+  EF_HEXAGON_MACH_V91 = EF_HEXAGON_ISA_V91,      // Hexagon V91
 
   EF_HEXAGON_MACH = 0x0000ffff, // Hexagon V..
 };

[androm3da]

Can you make corresponding changes in ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset() in llvm/lib/ObjectYAML/ELFYAML.cpp?

[quic-areg]

Can you make corresponding changes in ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset() in llvm/lib/ObjectYAML/ELFYAML.cpp?

#163824