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[VPlan] Remove loop region in optimizeForVFAndUF. #108378
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fhahn
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llvm:main
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fhahn:vplan-remove-loop-region-instead-of-using-branch-on-cond-true
Jan 5, 2025
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d3614bc
[VPlan] Use ResumePhi to create reduction resume phis.
fhahn 5f8fabe
[VPlan] Remove loop region in optimizeForVFAndUF.
fhahn c68ddd1
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn f0421c6
!fixup after merge
fhahn 4a0eb12
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn 9499aaa
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn a4843b5
!fixup address latest comments, thanks!
fhahn f5d2bc6
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn 1222e23
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn 706b681
!fixup address latest comments, thanks!
fhahn 71436fc
!fixup fix formatting
fhahn 38cbdf6
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn cc43362
!fixup update after merge.
fhahn e758945
!fixup remove unrelated changes.
fhahn d4e8c7e
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn 1d4b2e6
!fixup partial fixup after merging main.
fhahn 98529f3
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn 0c76e9d
!fixup update on top of current main, iterate to find vector.ph
fhahn dd45cad
[VPlan] Manage created blocks directly in VPlan. (NFC)
fhahn e72a71f
!fixup address comments, add comments
fhahn 407dbc1
[VPlan] Funnel
fhahn af48fcc
[VPlan] Funnel
fhahn f51412a
Merge remote-tracking branch 'origin/main' into manage-blocks-in-vplan
fhahn f2b5e53
Merge remote-tracking branch 'origin/main' into manage-blocks-in-vplan
fhahn 1f4febc
Merge branch 'manage-blocks-in-vplan' into vplan-remove-loop-region-i…
fhahn 3d412a1
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn 56a4181
!fixup update after merge
fhahn 88fcf60
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn 303ce93
!fixup adjust assert
fhahn 3f016cb
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn 430c369
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn f9db2d0
!fixup update extra tests.
fhahn cabc591
!fixup fix formatting
fhahn 057f2e9
[VPlan] Replace VPBBs with VPIRBBs during skeleton creation (NFC).
fhahn 60a046a
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn fe2c3a5
[VPlan] Track VectorPH during skeleton creation.
fhahn 26c94b1
!fixup restore original getVectorLoopRegion impl
fhahn 92c0ccc
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn 05b2e4e
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn df67f2e
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn e17003f
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn f180edb
!fixup address latest comments, thanks
fhahn 71ff80a
!fixup fix formatting
fhahn 911c50a
Merge remote-tracking branch 'origin/main' into vplan-remove-loop-reg…
fhahn 4f74827
!fixup restore newline and move comment
fhahn d17571d
!fixup move erase of term just before removing dead recipes.
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Original file line number | Diff line number | Diff line change |
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@@ -2927,6 +2927,9 @@ void InnerLoopVectorizer::fixVectorizedLoop(VPTransformState &State, | |
for (const auto &KV : Plan.getLiveOuts()) | ||
KV.second->fixPhi(Plan, State); | ||
|
||
if (!isa<VPRegionBlock>(State.Plan->getEntry()->getSingleSuccessor())) | ||
return; | ||
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||
for (Instruction *PI : PredicatedInstructions) | ||
sinkScalarOperands(&*PI); | ||
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||
|
@@ -7467,23 +7470,31 @@ static void addRuntimeUnrollDisableMetaData(Loop *L) { | |
} | ||
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||
// Check if \p RedResult is a ComputeReductionResult instruction, and if it is | ||
// create a merge phi node for it. | ||
static void createAndCollectMergePhiForReduction( | ||
VPInstruction *RedResult, | ||
VPTransformState &State, Loop *OrigLoop, BasicBlock *LoopMiddleBlock, | ||
bool VectorizingEpilogue) { | ||
// create a merge phi node for it and add incoming values from the main vector | ||
// loop. | ||
static void updateAndCollectMergePhiForReductionForEpilogueVectorization( | ||
VPInstruction *RedResult, VPTransformState &State, Loop *OrigLoop, | ||
BasicBlock *LoopMiddleBlock, bool VectorizingEpilogue) { | ||
if (!RedResult || | ||
RedResult->getOpcode() != VPInstruction::ComputeReductionResult) | ||
return; | ||
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||
using namespace VPlanPatternMatch; | ||
VPValue *ResumePhiVPV = | ||
cast<VPInstruction>(*find_if(RedResult->users(), [](VPUser *U) { | ||
return match(U, m_VPInstruction<VPInstruction::ResumePhi>(m_VPValue(), | ||
m_VPValue())); | ||
})); | ||
auto *BCBlockPhi = cast<PHINode>(State.get(ResumePhiVPV, true)); | ||
auto *PhiR = cast<VPReductionPHIRecipe>(RedResult->getOperand(0)); | ||
const RecurrenceDescriptor &RdxDesc = PhiR->getRecurrenceDescriptor(); | ||
if (!VectorizingEpilogue) | ||
return; | ||
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||
Value *FinalValue = State.get(RedResult, VPLane(VPLane::getFirstLane())); | ||
auto *ResumePhi = | ||
dyn_cast<PHINode>(PhiR->getStartValue()->getUnderlyingValue()); | ||
if (VectorizingEpilogue && RecurrenceDescriptor::isAnyOfRecurrenceKind( | ||
RdxDesc.getRecurrenceKind())) { | ||
if (RecurrenceDescriptor::isAnyOfRecurrenceKind( | ||
RdxDesc.getRecurrenceKind())) { | ||
auto *Cmp = cast<ICmpInst>(PhiR->getStartValue()->getUnderlyingValue()); | ||
assert(Cmp->getPredicate() == CmpInst::ICMP_NE); | ||
assert(Cmp->getOperand(1) == RdxDesc.getRecurrenceStartValue()); | ||
|
@@ -7493,40 +7504,15 @@ static void createAndCollectMergePhiForReduction( | |
"when vectorizing the epilogue loop, we need a resume phi from main " | ||
"vector loop"); | ||
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||
// TODO: bc.merge.rdx should not be created here, instead it should be | ||
// modeled in VPlan. | ||
BasicBlock *LoopScalarPreHeader = OrigLoop->getLoopPreheader(); | ||
// Create a phi node that merges control-flow from the backedge-taken check | ||
// block and the middle block. | ||
auto *BCBlockPhi = | ||
PHINode::Create(FinalValue->getType(), 2, "bc.merge.rdx", | ||
LoopScalarPreHeader->getTerminator()->getIterator()); | ||
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||
// If we are fixing reductions in the epilogue loop then we should already | ||
// have created a bc.merge.rdx Phi after the main vector body. Ensure that | ||
// we carry over the incoming values correctly. | ||
for (auto *Incoming : predecessors(LoopScalarPreHeader)) { | ||
if (Incoming == LoopMiddleBlock) | ||
BCBlockPhi->addIncoming(FinalValue, Incoming); | ||
else if (ResumePhi && is_contained(ResumePhi->blocks(), Incoming)) | ||
BCBlockPhi->addIncoming(ResumePhi->getIncomingValueForBlock(Incoming), | ||
Incoming); | ||
else | ||
BCBlockPhi->addIncoming(RdxDesc.getRecurrenceStartValue(), Incoming); | ||
if (ResumePhi && is_contained(ResumePhi->blocks(), Incoming)) | ||
BCBlockPhi->setIncomingValueForBlock( | ||
Incoming, ResumePhi->getIncomingValueForBlock(Incoming)); | ||
} | ||
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||
auto *OrigPhi = cast<PHINode>(PhiR->getUnderlyingValue()); | ||
// TODO: This fixup should instead be modeled in VPlan. | ||
// Fix the scalar loop reduction variable with the incoming reduction sum | ||
// from the vector body and from the backedge value. | ||
int IncomingEdgeBlockIdx = | ||
OrigPhi->getBasicBlockIndex(OrigLoop->getLoopLatch()); | ||
assert(IncomingEdgeBlockIdx >= 0 && "Invalid block index"); | ||
// Pick the other block. | ||
int SelfEdgeBlockIdx = (IncomingEdgeBlockIdx ? 0 : 1); | ||
OrigPhi->setIncomingValue(SelfEdgeBlockIdx, BCBlockPhi); | ||
Instruction *LoopExitInst = RdxDesc.getLoopExitInstr(); | ||
OrigPhi->setIncomingValue(IncomingEdgeBlockIdx, LoopExitInst); | ||
} | ||
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DenseMap<const SCEV *, Value *> LoopVectorizationPlanner::executePlan( | ||
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@@ -7554,7 +7540,8 @@ DenseMap<const SCEV *, Value *> LoopVectorizationPlanner::executePlan( | |
LLVM_DEBUG(BestVPlan.dump()); | ||
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||
// Perform the actual loop transformation. | ||
VPTransformState State(BestVF, BestUF, LI, DT, ILV.Builder, &ILV, &BestVPlan); | ||
VPTransformState State(BestVF, BestUF, LI, DT, ILV.Builder, &ILV, &BestVPlan, | ||
Legal->getWidestInductionType()); | ||
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||
// 0. Generate SCEV-dependent code into the preheader, including TripCount, | ||
// before making any changes to the CFG. | ||
|
@@ -7615,12 +7602,14 @@ DenseMap<const SCEV *, Value *> LoopVectorizationPlanner::executePlan( | |
BestVPlan.execute(&State); | ||
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||
// 2.5 Collect reduction resume values. | ||
auto *ExitVPBB = | ||
cast<VPBasicBlock>(BestVPlan.getVectorLoopRegion()->getSingleSuccessor()); | ||
for (VPRecipeBase &R : *ExitVPBB) { | ||
createAndCollectMergePhiForReduction( | ||
dyn_cast<VPInstruction>(&R), State, OrigLoop, | ||
State.CFG.VPBB2IRBB[ExitVPBB], ExpandedSCEVs); | ||
if (IsEpilogueVectorization) { | ||
auto *ExitVPBB = cast<VPBasicBlock>( | ||
BestVPlan.getVectorLoopRegion()->getSingleSuccessor()); | ||
for (VPRecipeBase &R : *ExitVPBB) { | ||
updateAndCollectMergePhiForReductionForEpilogueVectorization( | ||
dyn_cast<VPInstruction>(&R), State, OrigLoop, | ||
State.CFG.VPBB2IRBB[ExitVPBB], ExpandedSCEVs); | ||
} | ||
} | ||
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||
// 2.6. Maintain Loop Hints | ||
|
@@ -7632,24 +7621,26 @@ DenseMap<const SCEV *, Value *> LoopVectorizationPlanner::executePlan( | |
makeFollowupLoopID(OrigLoopID, {LLVMLoopVectorizeFollowupAll, | ||
LLVMLoopVectorizeFollowupVectorized}); | ||
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||
VPBasicBlock *HeaderVPBB = | ||
BestVPlan.getVectorLoopRegion()->getEntryBasicBlock(); | ||
Loop *L = LI->getLoopFor(State.CFG.VPBB2IRBB[HeaderVPBB]); | ||
if (VectorizedLoopID) | ||
L->setLoopID(*VectorizedLoopID); | ||
else { | ||
// Keep all loop hints from the original loop on the vector loop (we'll | ||
// replace the vectorizer-specific hints below). | ||
if (MDNode *LID = OrigLoop->getLoopID()) | ||
L->setLoopID(LID); | ||
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||
LoopVectorizeHints Hints(L, true, *ORE); | ||
Hints.setAlreadyVectorized(); | ||
if (auto *R = | ||
dyn_cast<VPRegionBlock>(BestVPlan.getEntry()->getSingleSuccessor())) { | ||
VPBasicBlock *HeaderVPBB = R->getEntryBasicBlock(); | ||
Loop *L = LI->getLoopFor(State.CFG.VPBB2IRBB[HeaderVPBB]); | ||
if (VectorizedLoopID) | ||
L->setLoopID(*VectorizedLoopID); | ||
else { | ||
// Keep all loop hints from the original loop on the vector loop (we'll | ||
// replace the vectorizer-specific hints below). | ||
if (MDNode *LID = OrigLoop->getLoopID()) | ||
L->setLoopID(LID); | ||
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||
LoopVectorizeHints Hints(L, true, *ORE); | ||
Hints.setAlreadyVectorized(); | ||
} | ||
TargetTransformInfo::UnrollingPreferences UP; | ||
TTI.getUnrollingPreferences(L, *PSE.getSE(), UP, ORE); | ||
if (!UP.UnrollVectorizedLoop || CanonicalIVStartValue) | ||
addRuntimeUnrollDisableMetaData(L); | ||
} | ||
TargetTransformInfo::UnrollingPreferences UP; | ||
TTI.getUnrollingPreferences(L, *PSE.getSE(), UP, ORE); | ||
if (!UP.UnrollVectorizedLoop || CanonicalIVStartValue) | ||
addRuntimeUnrollDisableMetaData(L); | ||
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||
// 3. Fix the vectorized code: take care of header phi's, live-outs, | ||
// predication, updating analyses. | ||
|
@@ -7658,15 +7649,20 @@ DenseMap<const SCEV *, Value *> LoopVectorizationPlanner::executePlan( | |
ILV.printDebugTracesAtEnd(); | ||
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||
// 4. Adjust branch weight of the branch in the middle block. | ||
auto *MiddleTerm = | ||
cast<BranchInst>(State.CFG.VPBB2IRBB[ExitVPBB]->getTerminator()); | ||
if (MiddleTerm->isConditional() && | ||
hasBranchWeightMD(*OrigLoop->getLoopLatch()->getTerminator())) { | ||
// Assume that `Count % VectorTripCount` is equally distributed. | ||
unsigned TripCount = BestVPlan.getUF() * State.VF.getKnownMinValue(); | ||
assert(TripCount > 0 && "trip count should not be zero"); | ||
const uint32_t Weights[] = {1, TripCount - 1}; | ||
setBranchWeights(*MiddleTerm, Weights, /*IsExpected=*/false); | ||
if (auto *R = | ||
dyn_cast<VPRegionBlock>(BestVPlan.getEntry()->getSingleSuccessor())) { | ||
auto *ExitVPBB = cast<VPBasicBlock>(R->getSingleSuccessor()); | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Overwrite ExitVPBB set to middle block above? There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Name always refers to the middle block, fixed in 11c6af6, thanks |
||
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auto *MiddleTerm = | ||
cast<BranchInst>(State.CFG.VPBB2IRBB[ExitVPBB]->getTerminator()); | ||
if (MiddleTerm->isConditional() && | ||
hasBranchWeightMD(*OrigLoop->getLoopLatch()->getTerminator())) { | ||
// Assume that `Count % VectorTripCount` is equally distributed. | ||
unsigned TripCount = BestVPlan.getUF() * State.VF.getKnownMinValue(); | ||
assert(TripCount > 0 && "trip count should not be zero"); | ||
const uint32_t Weights[] = {1, TripCount - 1}; | ||
setBranchWeights(*MiddleTerm, Weights, /*IsExpected=*/false); | ||
} | ||
} | ||
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return State.ExpandedSCEVs; | ||
|
@@ -9411,6 +9407,22 @@ void LoopVectorizationPlanner::adjustRecipesForReductions( | |
}); | ||
FinalReductionResult->insertBefore(*MiddleVPBB, IP); | ||
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VPBasicBlock *ScalarPHVPBB = nullptr; | ||
if (MiddleVPBB->getNumSuccessors() == 2) { | ||
// Order is strict: first is the exit block, second is the scalar | ||
// preheader. | ||
ScalarPHVPBB = cast<VPBasicBlock>(MiddleVPBB->getSuccessors()[1]); | ||
} else { | ||
ScalarPHVPBB = cast<VPBasicBlock>(MiddleVPBB->getSingleSuccessor()); | ||
} | ||
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VPBuilder ScalarPHBuilder(ScalarPHVPBB); | ||
auto *ResumePhiRecipe = ScalarPHBuilder.createNaryOp( | ||
VPInstruction::ResumePhi, {FinalReductionResult, PhiR->getStartValue()}, | ||
{}, "bc.merge.rdx"); | ||
auto *RedPhi = cast<PHINode>(PhiR->getUnderlyingInstr()); | ||
Plan->addLiveOut(RedPhi, ResumePhiRecipe); | ||
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// Adjust AnyOf reductions; replace the reduction phi for the selected value | ||
// with a boolean reduction phi node to check if the condition is true in | ||
// any iteration. The final value is selected by the final | ||
|
@@ -9464,7 +9476,8 @@ void VPDerivedIVRecipe::execute(VPTransformState &State) { | |
State.Builder, CanonicalIV, getStartValue()->getLiveInIRValue(), Step, | ||
Kind, cast_if_present<BinaryOperator>(FPBinOp)); | ||
DerivedIV->setName("offset.idx"); | ||
assert(DerivedIV != CanonicalIV && "IV didn't need transforming?"); | ||
assert((isa<Constant>(CanonicalIV) || DerivedIV != CanonicalIV) && | ||
"IV didn't need transforming?"); | ||
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State.set(this, DerivedIV, VPLane(0)); | ||
} | ||
|
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Added, thanks!