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Merged
merged 2 commits into from
Oct 2, 2024
Merged

ValueTracking: strip stray break in recur-match #109794

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63c2cf4
ValueTracking: strip stray break in recur-match
artagnon Sep 24, 2024
91b9ee9
known-non-zero: update comment
artagnon Oct 2, 2024
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2 changes: 0 additions & 2 deletions llvm/lib/Analysis/ValueTracking.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1515,8 +1515,6 @@ static void computeKnownBitsFromOperator(const Operator *I,
Known3.isNonNegative())
Known.makeNonNegative();
}

break;
}
}

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6 changes: 3 additions & 3 deletions llvm/test/Transforms/InstCombine/cast_phi.ll
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Expand Up @@ -29,7 +29,7 @@ define void @MainKernel(i32 %iNumSteps, i32 %tid, i32 %base) {
; CHECK-NEXT: [[TMP2:%.*]] = phi float [ [[TMP11:%.*]], [[DOTBB12]] ], [ [[CONV_I]], [[DOTBB2]] ]
; CHECK-NEXT: [[I12_06:%.*]] = phi i32 [ [[SUB:%.*]], [[DOTBB12]] ], [ [[INUMSTEPS]], [[DOTBB2]] ]
; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i32 [[I12_06]], [[BASE:%.*]]
; CHECK-NEXT: [[ADD:%.*]] = add i32 [[I12_06]], 1
; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[I12_06]], 1
; CHECK-NEXT: [[CONV_I9:%.*]] = sext i32 [[ADD]] to i64
; CHECK-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds [258 x float], ptr [[CALLA]], i64 0, i64 [[CONV_I9]]
; CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds [258 x float], ptr [[CALLB]], i64 0, i64 [[CONV_I9]]
Expand Down Expand Up @@ -70,8 +70,8 @@ define void @MainKernel(i32 %iNumSteps, i32 %tid, i32 %base) {
; CHECK-NEXT: store float [[TMP10]], ptr [[ARRAYIDX6]], align 4
; CHECK-NEXT: br label [[DOTBB12]]
; CHECK: .bb12:
; CHECK-NEXT: [[SUB]] = add i32 [[I12_06]], -4
; CHECK-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[SUB]], 0
; CHECK-NEXT: [[SUB]] = add nsw i32 [[I12_06]], -4
; CHECK-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[I12_06]], 4
; CHECK-NEXT: br i1 [[CMP13]], label [[DOTBB3]], label [[DOTBB8]]
;
%callA = alloca [258 x float], align 4
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7 changes: 3 additions & 4 deletions llvm/test/Transforms/InstCombine/known-non-zero.ll
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Expand Up @@ -102,12 +102,11 @@ define void @D60846_miscompile(ptr %p) {
; CHECK-NEXT: [[IS_ZERO:%.*]] = icmp eq i16 [[I]], 0
; CHECK-NEXT: br i1 [[IS_ZERO]], label [[COMMON]], label [[NON_ZERO:%.*]]
; CHECK: non_zero:
; CHECK-NEXT: [[IS_ONE:%.*]] = icmp eq i16 [[I]], 1
; CHECK-NEXT: store i1 [[IS_ONE]], ptr [[P:%.*]], align 1
; CHECK-NEXT: store i1 true, ptr [[P:%.*]], align 1
; CHECK-NEXT: br label [[COMMON]]
; CHECK: common:
; CHECK-NEXT: [[I_INC]] = add i16 [[I]], 1
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp ult i16 [[I_INC]], 2
; CHECK-NEXT: [[I_INC]] = add nuw nsw i16 [[I]], 1
; CHECK-NEXT: [[LOOP_COND:%.*]] = icmp eq i16 [[I]], 0
; CHECK-NEXT: br i1 [[LOOP_COND]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret void
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32 changes: 16 additions & 16 deletions llvm/test/Transforms/InstCombine/remove-loop-phi-multiply-by-zero.ll
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Expand Up @@ -6,8 +6,8 @@ define double @test_mul_fast_flags(ptr %arr_d) {
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[I_02:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[INC]] = add i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[INC]], 1000
; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[I_02]], 999
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[END:%.*]]
; CHECK: end:
; CHECK-NEXT: ret double 0.000000e+00
Expand Down Expand Up @@ -36,8 +36,8 @@ define double @test_nsz_nnan_flags_enabled(ptr %arr_d) {
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[I_02:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
; CHECK-NEXT: [[INC]] = add i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[INC]], 1000
; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[I_02]], 999
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[END:%.*]]
; CHECK: end:
; CHECK-NEXT: ret double 0.000000e+00
Expand Down Expand Up @@ -70,8 +70,8 @@ define double @test_nnan_flag_enabled(ptr %arr_d) {
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x double], ptr [[ARR_D:%.*]], i64 0, i64 [[I_02]]
; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[MUL]] = fmul nnan double [[F_PROD_01]], [[TMP0]]
; CHECK-NEXT: [[INC]] = add i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[INC]], 1000
; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[I_02]], 999
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[END:%.*]]
; CHECK: end:
; CHECK-NEXT: ret double [[MUL]]
Expand Down Expand Up @@ -104,8 +104,8 @@ define double @test_ninf_flag_enabled(ptr %arr_d) {
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x double], ptr [[ARR_D:%.*]], i64 0, i64 [[I_02]]
; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[MUL]] = fmul ninf double [[F_PROD_01]], [[TMP0]]
; CHECK-NEXT: [[INC]] = add i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[INC]], 1000
; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[I_02]], 999
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[END:%.*]]
; CHECK: end:
; CHECK-NEXT: ret double [[MUL]]
Expand Down Expand Up @@ -138,8 +138,8 @@ define double @test_nsz_flag_enabled(ptr %arr_d) {
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x double], ptr [[ARR_D:%.*]], i64 0, i64 [[I_02]]
; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[MUL]] = fmul nsz double [[F_PROD_01]], [[TMP0]]
; CHECK-NEXT: [[INC]] = add i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[INC]], 1000
; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[I_02]], 999
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[END:%.*]]
; CHECK: end:
; CHECK-NEXT: ret double [[MUL]]
Expand Down Expand Up @@ -172,8 +172,8 @@ define double @test_phi_initalise_to_non_zero(ptr %arr_d) {
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x double], ptr [[ARR_D:%.*]], i64 0, i64 [[I_02]]
; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[ARRAYIDX]], align 8
; CHECK-NEXT: [[MUL]] = fmul fast double [[F_PROD_01]], [[TMP0]]
; CHECK-NEXT: [[INC]] = add i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[INC]], 1000
; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[I_02]], 999
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[END:%.*]]
; CHECK: end:
; CHECK-NEXT: ret double [[MUL]]
Expand Down Expand Up @@ -284,8 +284,8 @@ define i32 @test_int_phi_operands(ptr %arr_d) {
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[ARR_D:%.*]], i64 [[I_02]]
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[MUL]] = mul nsw i32 [[F_PROD_01]], [[TMP0]]
; CHECK-NEXT: [[INC]] = add i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[INC]], 1000
; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[I_02]], 999
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[END:%.*]]
; CHECK: end:
; CHECK-NEXT: ret i32 [[MUL]]
Expand Down Expand Up @@ -318,8 +318,8 @@ define i32 @test_int_phi_operands_initalise_to_non_zero(ptr %arr_d) {
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[ARR_D:%.*]], i64 [[I_02]]
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[MUL]] = mul i32 [[F_PROD_01]], [[TMP0]]
; CHECK-NEXT: [[INC]] = add i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[INC]], 1000
; CHECK-NEXT: [[INC]] = add nuw nsw i64 [[I_02]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[I_02]], 999
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[END:%.*]]
; CHECK: end:
; CHECK-NEXT: ret i32 [[MUL]]
Expand Down