[LiveDebugValues][NVPTX]VarLocBasedImpl handle vregs, enable for NVPTX

llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.cpp

@@ -102,14 +102,6 @@ LiveDebugValues::LiveDebugValues() : MachineFunctionPass(ID) {
 }
 
 bool LiveDebugValues::runOnMachineFunction(MachineFunction &MF) {
-  // Except for Wasm, all targets should be only using physical register at this
-  // point. Wasm only use virtual registers throught its pipeline, but its
-  // virtual registers don't participate  in this LiveDebugValues analysis; only
-  // its target indices do.
-  assert(MF.getTarget().getTargetTriple().isWasm() ||
-         MF.getProperties().hasProperty(
-             MachineFunctionProperties::Property::NoVRegs));
-
   bool InstrRefBased = MF.useDebugInstrRef();
   // Allow the user to force selection of InstrRef LDV.
   InstrRefBased |= ForceInstrRefLDV;

llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp

@@ -239,6 +239,10 @@ struct LocIndex {
   /// becomes a problem.
   static constexpr u32_location_t kWasmLocation = kFirstInvalidRegLocation + 2;
 
+  /// The first location that is reserved for VarLocs with locations of kind
+  /// VirtualRegisterKind.
+  static constexpr u32_location_t kFirstVirtualRegLocation = 1 << 31;
+
   LocIndex(u32_location_t Location, u32_index_t Index)
       : Location(Location), Index(Index) {}
 
@@ -810,9 +814,10 @@ class VarLocBasedLDV : public LDVImpl {
         VL.getDescribingRegs(Locations);
         assert(all_of(Locations,
                       [](auto RegNo) {
-                        return RegNo < LocIndex::kFirstInvalidRegLocation;
+                        return (RegNo < LocIndex::kFirstInvalidRegLocation) ||
+                               (LocIndex::kFirstVirtualRegLocation <= RegNo);
                       }) &&
-               "Physreg out of range?");
+               "Physical or virtual register out of range?");
         if (VL.containsSpillLocs())
           Locations.push_back(LocIndex::kSpillLocation);
         if (VL.containsWasmLocs())
@@ -1240,9 +1245,9 @@ void VarLocBasedLDV::getUsedRegs(const VarLocSet &CollectFrom,
       LocIndex::rawIndexForReg(LocIndex::kFirstRegLocation);
   uint64_t FirstInvalidIndex =
       LocIndex::rawIndexForReg(LocIndex::kFirstInvalidRegLocation);
-  for (auto It = CollectFrom.find(FirstRegIndex),
-            End = CollectFrom.find(FirstInvalidIndex);
-       It != End;) {
+  uint64_t FirstVirtualRegIndex =
+      LocIndex::rawIndexForReg(LocIndex::kFirstVirtualRegLocation);
+  auto doGetUsedRegs = [&](VarLocSet::const_iterator &It) {
     // We found a VarLoc ID for a VarLoc that lives in a register. Figure out
     // which register and add it to UsedRegs.
     uint32_t FoundReg = LocIndex::fromRawInteger(*It).Location;
@@ -1255,6 +1260,16 @@ void VarLocBasedLDV::getUsedRegs(const VarLocSet &CollectFrom,
     // guaranteed to move on to the next register (or to end()).
     uint64_t NextRegIndex = LocIndex::rawIndexForReg(FoundReg + 1);
     It.advanceToLowerBound(NextRegIndex);
+  };
+  for (auto It = CollectFrom.find(FirstRegIndex),
+            End = CollectFrom.find(FirstInvalidIndex);
+       It != End;) {
+    doGetUsedRegs(It);
+  }
+  for (auto It = CollectFrom.find(FirstVirtualRegIndex),
+            End = CollectFrom.end();
+       It != End;) {
+    doGetUsedRegs(It);
   }
 }
 

llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp

@@ -309,7 +309,6 @@ void NVPTXPassConfig::addIRPasses() {
   disablePass(&MachineCopyPropagationID);
   disablePass(&TailDuplicateID);
   disablePass(&StackMapLivenessID);
-  disablePass(&LiveDebugValuesID);
   disablePass(&PostRAMachineSinkingID);
   disablePass(&PostRASchedulerID);
   disablePass(&FuncletLayoutID);