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[AMDGPU] Skip terminators when forcing emit zero flag #112116

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Merged
merged 1 commit into from
Oct 14, 2024
Merged

[AMDGPU] Skip terminators when forcing emit zero flag #112116

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4 changes: 3 additions & 1 deletion llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1824,7 +1824,9 @@ bool SIInsertWaitcnts::generateWaitcntInstBefore(MachineInstr &MI,
// Verify that the wait is actually needed.
ScoreBrackets.simplifyWaitcnt(Wait);

if (ForceEmitZeroFlag)
// When forcing emit, we need to skip terminators because that would break the
// terminators of the MBB if we emit a waitcnt between terminators.
if (ForceEmitZeroFlag && !MI.isTerminator())
Wait = WCG->getAllZeroWaitcnt(/*IncludeVSCnt=*/false);

if (ForceEmitWaitcnt[LOAD_CNT])
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33 changes: 33 additions & 0 deletions llvm/test/CodeGen/AMDGPU/waitcnt-debug-non-first-terminators.mir
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@@ -0,0 +1,33 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass si-insert-waitcnts -amdgpu-waitcnt-forcezero=1 %s -o - | FileCheck %s

---
name: waitcnt-debug-non-first-terminators
liveins:
machineFunctionInfo:
isEntryFunction: true
body: |
; CHECK-LABEL: name: waitcnt-debug-non-first-terminators
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc
; CHECK-NEXT: S_BRANCH %bb.2, implicit $scc
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: S_WAITCNT 0
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@arsenm arsenm Oct 14, 2024

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I see this version moves the waitcnt from the end of the block to the start of the successor blocks.

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@shiltian shiltian Oct 14, 2024

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Nah, this waitcnt was just inserted before S_NOP, which is always there. The previous version just didn't have all the check lines.

; CHECK-NEXT: S_NOP 0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: S_WAITCNT 0
; CHECK-NEXT: S_NOP 0
bb.0:
S_CBRANCH_SCC1 %bb.1, implicit $scc
S_BRANCH %bb.2, implicit $scc
bb.1:
S_NOP 0
bb.2:
S_NOP 0
...
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