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[LLVM] Trim intrinsics #112791

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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/GlobalConstructorFunction.hlsl
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// REQUIRES: directx-registered-target
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@jrtc27 jrtc27 Oct 22, 2024 •
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This seems wrong. Emitting LLVM IR from the Clang frontend should not require anything about the set of targets enabled in LLVM itself.

// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -emit-llvm -disable-llvm-passes %s -o - | FileCheck %s --check-prefixes=CHECK,NOINLINE
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -emit-llvm -O0 %s -o - | FileCheck %s --check-prefixes=CHECK,INLINE

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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/GlobalConstructors.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -x hlsl -emit-llvm -disable-llvm-passes %s -o - | FileCheck %s

RWBuffer<float> Buffer;
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/GlobalDestructors.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -emit-llvm -disable-llvm-passes %s -o - | FileCheck %s --check-prefixes=CS,NOINLINE,CHECK
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -emit-llvm -disable-llvm-passes %s -o - | FileCheck %s --check-prefixes=LIB,NOINLINE,CHECK
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -emit-llvm -O0 %s -o - | FileCheck %s --check-prefixes=INLINE,CHECK
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/builtins/RWBuffer-annotations.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -x hlsl -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s

RWBuffer<float> Buffer1;
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-DXIL
// FIXME: SPIR-V codegen of llvm.spv.handle.fromBinding is not yet implemented
// RUN-DISABLED: %clang_cc1 -triple spirv-vulkan-library -x hlsl -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV
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5 changes: 3 additions & 2 deletions clang/test/CodeGenHLSL/builtins/RWBuffer-elementtype.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.2-compute -finclude-default-header -fnative-half-type -emit-llvm -o - %s | FileCheck %s

// NOTE: The type name number and whether the struct is packed or not will mostly
// likely change once subscript operators are properly implemented (llvm/llvm-project#95956)
// and theinterim field of the contained type is removed.
// likely change once subscript operators are properly implemented (llvm/llvm-project#95956)
// and the interim field of the contained type is removed.

// CHECK: %"class.hlsl::RWBuffer" = type <{ target("dx.TypedBuffer", i16, 1, 0, 1)
// CHECK: %"class.hlsl::RWBuffer.0" = type <{ target("dx.TypedBuffer", i16, 1, 0, 0)
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/builtins/RWBuffer-subscript.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -emit-llvm -o - -O0 %s | FileCheck %s

RWBuffer<int> In;
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/builtins/RasterizerOrderedBuffer-annotations.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-pixel -x hlsl -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s

RasterizerOrderedBuffer<float> Buffer1;
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/builtins/StructuredBuffer-annotations.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -x hlsl -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s

StructuredBuffer<float> Buffer1;
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/builtins/StructuredBuffer-constructor.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-DXIL
// RUN-DISABLED: %clang_cc1 -triple spirv-vulkan-library -x hlsl -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV

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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/builtins/StructuredBuffer-elementtype.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.2-compute -finclude-default-header -fnative-half-type -emit-llvm -o - %s | FileCheck %s

// NOTE: The number in type name and whether the struct is packed or not will mostly
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/builtins/StructuredBuffer-subscript.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -emit-llvm -o - -O0 %s | FileCheck %s

StructuredBuffer<int> In;
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/WaveReadLaneAt.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -fnative-half-type -triple \
// RUN: dxil-pc-shadermodel6.3-compute %s -emit-llvm -disable-llvm-passes -o - | \
// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-DXIL
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/all.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/any.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/builtins/clamp-builtin.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.3-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -o - | FileCheck %s

// CHECK-LABEL: builtin_test_clamp_int4
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/builtins/clamp.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.3-library %s \
// RUN: -fnative-half-type -emit-llvm -disable-llvm-passes -o - | \
// RUN: FileCheck %s --check-prefixes=CHECK,NATIVE_HALF
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/builtins/cross.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/degrees.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -finclude-default-header -triple \
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/dot.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/frac.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/isinf.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/length.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/builtins/lerp-builtin.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple dxil-pc-shadermodel6.3-library %s -fnative-half-type -emit-llvm -disable-llvm-passes -o - | FileCheck %s

// CHECK-LABEL: builtin_lerp_half_vector
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/lerp.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/mad.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/normalize.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/radians.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/rsqrt.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/saturate.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -finclude-default-header -triple dxil-pc-shadermodel6.3-library %s \
// RUN: -fnative-half-type -emit-llvm -disable-llvm-passes -o - | \
// RUN: FileCheck %s --check-prefixes=CHECK,NATIVE_HALF -Dtar=dx
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/sign.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/step.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
// RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/builtins/wave_get_lane_index_do_while.hlsl
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// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -x hlsl -triple \
// RUN: spirv-pc-vulkan-library %s -emit-llvm -disable-llvm-passes -o - | FileCheck %s

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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/builtins/wave_get_lane_index_simple.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -x hlsl -triple \
// RUN: spirv-pc-vulkan-library %s -emit-llvm -disable-llvm-passes -o - | FileCheck %s \
// RUN: --check-prefixes=CHECK,CHECK-SPIRV
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2 changes: 2 additions & 0 deletions clang/test/CodeGenHLSL/builtins/wave_is_first_lane.hlsl
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// REQUIRES: directx-registered-target
// REQUIRES: spirv-registered-target
// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -x hlsl -triple \
// RUN: spirv-pc-vulkan-compute %s -emit-llvm -disable-llvm-passes -o - | \
// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/implicit-norecurse-attrib.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -x hlsl -triple dxil-pc-shadermodel6.3-library -finclude-default-header %s -emit-llvm -disable-llvm-passes -o - | FileCheck %s
// RUN: %clang_cc1 -x hlsl -triple dxil-pc-shadermodel6.0-compute -finclude-default-header %s -emit-llvm -disable-llvm-passes -o - | FileCheck %s

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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/inline-constructors.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -std=hlsl202x -emit-llvm -o - -disable-llvm-passes %s | FileCheck %s --check-prefixes=CHECK,NOINLINE
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -std=hlsl202x -emit-llvm -o - -disable-llvm-passes %s | FileCheck %s --check-prefixes=CHECK,NOINLINE
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -std=hlsl202x -emit-llvm -o - -O0 %s | FileCheck %s --check-prefixes=CHECK,INLINE
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/inline-functions.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library %s -emit-llvm -disable-llvm-passes -o - | FileCheck %s --check-prefixes=CHECK,NOINLINE
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library %s -emit-llvm -O0 -o - | FileCheck %s --check-prefixes=CHECK,INLINE
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library %s -emit-llvm -O1 -o - | FileCheck %s --check-prefixes=CHECK,INLINE
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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/semantics/DispatchThreadID.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm -finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-DXIL -DTARGET=dx
// RUN: %clang_cc1 -triple spirv-linux-vulkan-library -x hlsl -emit-llvm -finclude-default-header -disable-llvm-passes -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV -DTARGET=spv

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1 change: 1 addition & 0 deletions clang/test/CodeGenHLSL/semantics/GroupIndex-codegen.hlsl
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// REQUIRES: directx-registered-target
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -x hlsl -emit-llvm -disable-llvm-passes -o - -hlsl-entry main %s | FileCheck %s

[numthreads(1,1,1)]
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35 changes: 35 additions & 0 deletions llvm/CMakeLists.txt
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Expand Up @@ -625,6 +625,41 @@ set(LLVM_TARGETS_TO_BUILD
${LLVM_EXPERIMENTAL_TARGETS_TO_BUILD})
list(REMOVE_DUPLICATES LLVM_TARGETS_TO_BUILD)

#set(ENABLED_INTRINSIC_TARGETS ${LLVM_ALL_TARGETS} ${LLVM_ALL_EXPERIMENTAL_TARGETS})
set(ENABLED_INTRINSIC_TARGETS ${LLVM_TARGETS_TO_BUILD})

# Build a list of intrinsic target prefixes for targets that have been enabled.
string(REPLACE ";" "," ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")
string(CONCAT ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}" ",")
string(REPLACE "AMDGPU" "R600,AMDGCN" ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")
string(REPLACE "PowerPC" "ppc" ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")
string(REPLACE "SPIRV" "spv" ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")
string(REPLACE "NVPTX" "nvvm" ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")
string(REPLACE "DirectX" "dx" ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")
string(REPLACE "WebAssembly" "wasm" ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")
string(REPLACE "SystemZ" "s390" ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")
# Remove target prefixes that do not have any intrinscs defined for them.
string(REPLACE "M68k," "" ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")
string(REPLACE "ARC," "" ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")
string(REPLACE "AVR," "" ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")
string(REPLACE "CSKY," "" ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")
string(REPLACE "Lanai," "" ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")
string(REPLACE "Sparc," "" ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")
string(REPLACE "MSP430," "" ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")
string(REPLACE "Xtensa," "" ENABLED_INTRINSIC_TARGETS "${ENABLED_INTRINSIC_TARGETS}")

# strip the last ,
string(LENGTH "${ENABLED_INTRINSIC_TARGETS}" enabled_len)
math(EXPR enabled_len "${enabled_len} - 1")
string(SUBSTRING "${ENABLED_INTRINSIC_TARGETS}" 0 "${enabled_len}" ENABLED_INTRINSIC_TARGETS)
if ("${ENABLED_INTRINSIC_TARGETS}" STREQUAL "")
set(ENABLED_INTRINSIC_TARGETS "none")
else()
string(TOLOWER ${ENABLED_INTRINSIC_TARGETS} ENABLED_INTRINSIC_TARGETS)
endif()
message(STATUS "Enabling intrinsic targets: ${ENABLED_INTRINSIC_TARGETS}")
set(ENABLED_INTRINSIC_TARGETS --enabled-targets=${ENABLED_INTRINSIC_TARGETS})

if (NOT CMAKE_SYSTEM_NAME MATCHES "OS390")
option(LLVM_ENABLE_PIC "Build Position-Independent Code" ON)
endif()
Expand Down
4 changes: 2 additions & 2 deletions llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -889,7 +889,7 @@ bool GIMatchTableExecutor::executeMatchTable(
case GIM_CheckIntrinsicID: {
uint64_t InsnID = readULEB();
uint64_t OpIdx = readULEB();
uint16_t Value = readU16();
uint32_t Value = readU32();
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckIntrinsicID(MIs["
<< InsnID << "]->getOperand(" << OpIdx
Expand Down Expand Up @@ -1185,7 +1185,7 @@ bool GIMatchTableExecutor::executeMatchTable(
}
case GIR_AddIntrinsicID: {
uint64_t InsnID = readULEB();
uint16_t Value = readU16();
uint32_t Value = readU32();
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
OutMIs[InsnID].addIntrinsicID((Intrinsic::ID)Value);
DEBUG_WITH_TYPE(TgtExecutor::getName(),
Expand Down
40 changes: 20 additions & 20 deletions llvm/include/llvm/IR/CMakeLists.txt
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2,24 +2,24 @@ set(LLVM_TARGET_DEFINITIONS Attributes.td)
tablegen(LLVM Attributes.inc -gen-attrs)

set(LLVM_TARGET_DEFINITIONS Intrinsics.td)
tablegen(LLVM IntrinsicImpl.inc -gen-intrinsic-impl)
tablegen(LLVM IntrinsicEnums.inc -gen-intrinsic-enums)
tablegen(LLVM IntrinsicsAArch64.h -gen-intrinsic-enums -intrinsic-prefix=aarch64)
tablegen(LLVM IntrinsicsAMDGPU.h -gen-intrinsic-enums -intrinsic-prefix=amdgcn)
tablegen(LLVM IntrinsicsARM.h -gen-intrinsic-enums -intrinsic-prefix=arm)
tablegen(LLVM IntrinsicsBPF.h -gen-intrinsic-enums -intrinsic-prefix=bpf)
tablegen(LLVM IntrinsicsDirectX.h -gen-intrinsic-enums -intrinsic-prefix=dx)
tablegen(LLVM IntrinsicsHexagon.h -gen-intrinsic-enums -intrinsic-prefix=hexagon)
tablegen(LLVM IntrinsicsLoongArch.h -gen-intrinsic-enums -intrinsic-prefix=loongarch)
tablegen(LLVM IntrinsicsMips.h -gen-intrinsic-enums -intrinsic-prefix=mips)
tablegen(LLVM IntrinsicsNVPTX.h -gen-intrinsic-enums -intrinsic-prefix=nvvm)
tablegen(LLVM IntrinsicsPowerPC.h -gen-intrinsic-enums -intrinsic-prefix=ppc)
tablegen(LLVM IntrinsicsR600.h -gen-intrinsic-enums -intrinsic-prefix=r600)
tablegen(LLVM IntrinsicsRISCV.h -gen-intrinsic-enums -intrinsic-prefix=riscv)
tablegen(LLVM IntrinsicsSPIRV.h -gen-intrinsic-enums -intrinsic-prefix=spv)
tablegen(LLVM IntrinsicsS390.h -gen-intrinsic-enums -intrinsic-prefix=s390)
tablegen(LLVM IntrinsicsWebAssembly.h -gen-intrinsic-enums -intrinsic-prefix=wasm)
tablegen(LLVM IntrinsicsX86.h -gen-intrinsic-enums -intrinsic-prefix=x86)
tablegen(LLVM IntrinsicsXCore.h -gen-intrinsic-enums -intrinsic-prefix=xcore)
tablegen(LLVM IntrinsicsVE.h -gen-intrinsic-enums -intrinsic-prefix=ve)
tablegen(LLVM IntrinsicImpl.inc -gen-intrinsic-impl ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicEnums.inc -gen-intrinsic-enums ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsAArch64.h -gen-intrinsic-enums -intrinsic-prefix=aarch64 ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsAMDGPU.h -gen-intrinsic-enums -intrinsic-prefix=amdgcn ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsARM.h -gen-intrinsic-enums -intrinsic-prefix=arm ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsBPF.h -gen-intrinsic-enums -intrinsic-prefix=bpf ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsDirectX.h -gen-intrinsic-enums -intrinsic-prefix=dx ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsHexagon.h -gen-intrinsic-enums -intrinsic-prefix=hexagon ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsLoongArch.h -gen-intrinsic-enums -intrinsic-prefix=loongarch ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsMips.h -gen-intrinsic-enums -intrinsic-prefix=mips ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsNVPTX.h -gen-intrinsic-enums -intrinsic-prefix=nvvm ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsPowerPC.h -gen-intrinsic-enums -intrinsic-prefix=ppc ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsR600.h -gen-intrinsic-enums -intrinsic-prefix=r600 ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsRISCV.h -gen-intrinsic-enums -intrinsic-prefix=riscv ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsSPIRV.h -gen-intrinsic-enums -intrinsic-prefix=spv ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsS390.h -gen-intrinsic-enums -intrinsic-prefix=s390 ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsWebAssembly.h -gen-intrinsic-enums -intrinsic-prefix=wasm ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsX86.h -gen-intrinsic-enums -intrinsic-prefix=x86 ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsXCore.h -gen-intrinsic-enums -intrinsic-prefix=xcore ${ENABLED_INTRINSIC_TARGETS})
tablegen(LLVM IntrinsicsVE.h -gen-intrinsic-enums -intrinsic-prefix=ve ${ENABLED_INTRINSIC_TARGETS})
add_public_tablegen_target(intrinsics_gen)
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