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6 changes: 4 additions & 2 deletions llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -11522,8 +11522,10 @@ getRegisterByName(const char* RegName, LLT VT, const MachineFunction &MF) const
if (AArch64::X1 <= Reg && Reg <= AArch64::X28) {
const AArch64RegisterInfo *MRI = Subtarget->getRegisterInfo();
unsigned DwarfRegNum = MRI->getDwarfRegNum(Reg, false);
if (!Subtarget->isXRegisterReserved(DwarfRegNum) &&
!MRI->isReservedReg(MF, Reg))
// check if X Register is reserved at either subtarget level or the
// machine function level.
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This is how other targets do it but AArch64 does not separate user reserved vs. reserved for ABI reasons (x18 is usually reserved for the OS to use).

I think you can still improve the error message but it'll need to check ReserveXRegister.

The tell tale sign this doesn't work is that nothing in AArch64 writes to UserReservedRegister but in RISCV and M68K they do (find in files or grep in llvm/, even if you don't understand what they're doing, it'll tell you something interacts with it at least).

I don't think it's worth moving AArch64 to the same style just for a better error though.

I think the tests pass because for AArch64 -ffixed-xN does set a bit in ReservedRegs.test and so the fact that isRegisterReservedByUser will always be False doesn't change anything.

I think if this becomes:
if (!ReservedRegs.test(Reg))

That should work. Then remove the new bitset you added.

Another way to do this is to keep the original code but instead of:

if (!Subtarget->isXRegisterReserved(DwarfRegNum) &&
        !MRI->isReservedReg(MF, Reg))
      Reg = 0;

report_fatal_error here with the improved message.

if (Subtarget->isXRegisterReserved(DwarfRegNum) ||
MRI->isReservedReg(MF, Reg))
Reg = 0;
}
if (Reg)
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3 changes: 2 additions & 1 deletion llvm/test/CodeGen/AArch64/aarch64-named-reg-x18.ll
Original file line number Diff line number Diff line change
@@ -1,8 +1,9 @@
; RUN: llc -mtriple=aarch64-fuchsia -o - %s
; RUN: not --crash llc < %s -mtriple=aarch64-fuchsia 2>&1 | FileCheck %s

define void @set_x18(i64 %x) {
entry:
; FIXME: Include an allocatable-specific error message
; CHECK: Invalid register name "x18".
tail call void @llvm.write_register.i64(metadata !0, i64 %x)
ret void
}
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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AArch64/arm64-named-reg-alloc.ll
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
define i32 @get_stack() nounwind {
entry:
; FIXME: Include an allocatable-specific error message
; CHECK: Invalid register name "x5".
; CHECK: Couldn't find the register class
%sp = call i32 @llvm.read_register.i32(metadata !0)
ret i32 %sp
}
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