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[InstCombine] Preserve the flag from RHS only if the and is bitwise #113164

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Merged
merged 2 commits into from
Oct 21, 2024
Merged

[InstCombine] Preserve the flag from RHS only if the and is bitwise #113164

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f3b8f0d
[InstCombine] Precommit tests for issue #113123
XChy Oct 21, 2024
44f109f
[InstCombine] Only preserve the flags from rhs when the and is not lo…
XChy Oct 21, 2024
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6 changes: 4 additions & 2 deletions llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1444,8 +1444,10 @@ Value *InstCombinerImpl::foldLogicOfFCmps(FCmpInst *LHS, FCmpInst *RHS,
}
if (IsLessThanOrLessEqual(IsAnd ? PredL : PredR)) {
BuilderTy::FastMathFlagGuard Guard(Builder);
Builder.setFastMathFlags(LHS->getFastMathFlags() |
RHS->getFastMathFlags());
FastMathFlags NewFlag = LHS->getFastMathFlags();
if (!IsLogicalSelect)
NewFlag |= RHS->getFastMathFlags();
Builder.setFastMathFlags(NewFlag);

Value *FAbs = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, LHS0);
return Builder.CreateFCmp(PredL, FAbs,
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39 changes: 39 additions & 0 deletions llvm/test/Transforms/InstCombine/fcmp-range-check-idiom.ll
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Expand Up @@ -359,3 +359,42 @@ define i1 @test_and_olt_fmf_propagation_union(float %x) {
%cond = and i1 %cmp1, %cmp2
ret i1 %cond
}

define i1 @test_and_olt_fmf_propagation_union_logical_rhs_poison(float %x) {
; CHECK-LABEL: define i1 @test_and_olt_fmf_propagation_union_logical_rhs_poison(
; CHECK-SAME: float [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[X]])
; CHECK-NEXT: [[COND:%.*]] = fcmp olt float [[TMP1]], 0x3C00000000000000
; CHECK-NEXT: ret i1 [[COND]]
;
%cmp1 = fcmp ninf olt float %x, 0x3C00000000000000
%cmp2 = fcmp ogt float %x, 0xBC00000000000000
%cond = select i1 %cmp2, i1 %cmp1, i1 false
ret i1 %cond
}

define i1 @test_and_olt_fmf_propagation_union_logical_lhs_poison(float %x) {
; CHECK-LABEL: define i1 @test_and_olt_fmf_propagation_union_logical_lhs_poison(
; CHECK-SAME: float [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = call ninf float @llvm.fabs.f32(float [[X]])
; CHECK-NEXT: [[COND:%.*]] = fcmp ninf olt float [[TMP1]], 0x3C00000000000000
; CHECK-NEXT: ret i1 [[COND]]
;
%cmp1 = fcmp olt float %x, 0x3C00000000000000
%cmp2 = fcmp ninf ogt float %x, 0xBC00000000000000
%cond = select i1 %cmp2, i1 %cmp1, i1 false
ret i1 %cond
}

define i1 @test_and_olt_fmf_propagation_union_logical_both_poison(float %x) {
; CHECK-LABEL: define i1 @test_and_olt_fmf_propagation_union_logical_both_poison(
; CHECK-SAME: float [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = call ninf float @llvm.fabs.f32(float [[X]])
; CHECK-NEXT: [[COND:%.*]] = fcmp ninf olt float [[TMP1]], 0x3C00000000000000
; CHECK-NEXT: ret i1 [[COND]]
;
%cmp1 = fcmp ninf olt float %x, 0x3C00000000000000
%cmp2 = fcmp ninf ogt float %x, 0xBC00000000000000
%cond = select i1 %cmp2, i1 %cmp1, i1 false
ret i1 %cond
}
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