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[X86] combineAndNotOrIntoAndNotAnd - don't fold other constant operands #113264

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Merged
merged 1 commit into from
Oct 23, 2024
Merged

[X86] combineAndNotOrIntoAndNotAnd - don't fold other constant operands #113264

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5 changes: 3 additions & 2 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -50049,8 +50049,9 @@ static SDValue combineAndNotOrIntoAndNotAnd(SDNode *N, SelectionDAG &DAG) {
SDValue X, Y, Z;
if (sd_match(N, m_And(m_Value(X),
m_OneUse(m_Or(m_Value(Y), m_Not(m_Value(Z))))))) {
// Don't fold if Y is a constant to prevent infinite loops.
if (!isa<ConstantSDNode>(Y))
// Don't fold if Y or Z are constants to prevent infinite loops.
if (!DAG.isConstantIntBuildVectorOrConstantInt(Y) &&
!DAG.isConstantIntBuildVectorOrConstantInt(Z))
return DAG.getNode(
ISD::AND, DL, VT, X,
DAG.getNOT(
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20 changes: 20 additions & 0 deletions llvm/test/CodeGen/X86/pr108731.ll
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Expand Up @@ -192,3 +192,23 @@ define void @PR112347(ptr %p0, ptr %p1, ptr %p2) {
ret void
}

define void @PR113240(i64 %a) {
; CHECK-LABEL: PR113240:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: notq %rax
; CHECK-NEXT: movabsq $8796093022206, %rcx # imm = 0x7FFFFFFFFFE
; CHECK-NEXT: notq %rcx
; CHECK-NEXT: orq %rax, %rcx
; CHECK-NEXT: andq %rdi, %rcx
; CHECK-NEXT: movq %rcx, 0
; CHECK-NEXT: retq
entry:
%and = and i64 %a, 8796093022206
%bf.value = and i64 8796093022206, 0
%not = xor i64 %and, -1
%and4 = and i64 %a, %not
store i64 %and4, ptr null, align 8
ret void
}

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