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Merged
FreddyLeaf merged 7 commits into from
Nov 18, 2024
Merged

[X86] Support -march=diamondrapids #113881

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4a7f17f
[X86] Support -march=diamondrapids
FreddyLeaf Oct 21, 2024
eef0752
clang-format
FreddyLeaf Oct 28, 2024
cb420a3
release note changes
FreddyLeaf Oct 28, 2024
52e63a0
address comments
FreddyLeaf Nov 15, 2024
74bddbe
Merge branch 'main' into diamondrapids
FreddyLeaf Nov 15, 2024
d584d06
Update with recently merged ISAs.
FreddyLeaf Nov 15, 2024
ab477fb
address comments
FreddyLeaf Nov 15, 2024
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2 changes: 2 additions & 0 deletions clang/docs/ReleaseNotes.rst
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Expand Up @@ -647,6 +647,8 @@ X86 Support
- Supported intrinsics for ``MOVRS AND AVX10.2``.
* Supported intrinsics of ``_mm(256|512)_(mask(z))_loadrs_epi(8|16|32|64)``.

- Supported ``-march/tune=diamondrapids``

Arm and AArch64 Support
^^^^^^^^^^^^^^^^^^^^^^^

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2 changes: 2 additions & 0 deletions clang/lib/Basic/Targets/X86.cpp
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Expand Up @@ -649,6 +649,7 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
case CK_GraniterapidsD:
case CK_Emeraldrapids:
case CK_Clearwaterforest:
case CK_DiamondRapids:
// FIXME: Historically, we defined this legacy name, it would be nice to
// remove it at some point. We've never exposed fine-grained names for
// recent primary x86 CPUs, and we should keep it that way.
Expand Down Expand Up @@ -1613,6 +1614,7 @@ std::optional<unsigned> X86TargetInfo::getCPUCacheLineSize() const {
case CK_GraniterapidsD:
case CK_Emeraldrapids:
case CK_Clearwaterforest:
case CK_DiamondRapids:
case CK_KNL:
case CK_KNM:
// K7
Expand Down
1 change: 1 addition & 0 deletions clang/test/CodeGen/attr-cpuspecific-cpus.c
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Expand Up @@ -43,6 +43,7 @@ ATTR(cpu_specific(icelake_client)) void CPU(void){}
ATTR(cpu_specific(tigerlake)) void CPU(void){}
ATTR(cpu_specific(alderlake)) void CPU(void){}
ATTR(cpu_specific(sapphirerapids)) void CPU(void){}
ATTR(cpu_specific(diamondrapids)) void CPU(void){}

// ALIAS CPUs
ATTR(cpu_specific(pentium_iii_no_xmm_regs)) void CPU0(void){}
Expand Down
1 change: 1 addition & 0 deletions clang/test/CodeGen/attr-target-mv.c
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Expand Up @@ -29,6 +29,7 @@ int __attribute__((target("arch=lunarlake"))) foo(void) {return 23;}
int __attribute__((target("arch=gracemont"))) foo(void) {return 24;}
int __attribute__((target("arch=pantherlake"))) foo(void) {return 25;}
int __attribute__((target("arch=clearwaterforest"))) foo(void) {return 26;}
int __attribute__((target("arch=diamondrapids"))) foo(void) {return 27;}
int __attribute__((target("default"))) foo(void) { return 2; }

int bar(void) {
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1 change: 1 addition & 0 deletions clang/test/CodeGen/target-builtin-noerror.c
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Expand Up @@ -209,4 +209,5 @@ void verifycpustrings(void) {
(void)__builtin_cpu_is("znver3");
(void)__builtin_cpu_is("znver4");
(void)__builtin_cpu_is("znver5");
(void)__builtin_cpu_is("diamondrapids");
}
4 changes: 4 additions & 0 deletions clang/test/Driver/x86-march.c
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Expand Up @@ -120,6 +120,10 @@
// RUN: | FileCheck %s -check-prefix=clearwaterforest
// clearwaterforest: "-target-cpu" "clearwaterforest"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=diamondrapids 2>&1 \
// RUN: | FileCheck %s -check-prefix=diamondrapids
// diamondrapids: "-target-cpu" "diamondrapids"
//
// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=lakemont 2>&1 \
// RUN: | FileCheck %s -check-prefix=lakemont
// lakemont: "-target-cpu" "lakemont"
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4 changes: 4 additions & 0 deletions clang/test/Misc/target-invalid-cpu-note/x86.c
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Expand Up @@ -69,6 +69,7 @@
// X86-SAME: {{^}}, graniterapids-d
// X86-SAME: {{^}}, emeraldrapids
// X86-SAME: {{^}}, clearwaterforest
// X86-SAME: {{^}}, diamondrapids
// X86-SAME: {{^}}, knl
// X86-SAME: {{^}}, knm
// X86-SAME: {{^}}, lakemont
Expand Down Expand Up @@ -155,6 +156,7 @@
// X86_64-SAME: {{^}}, graniterapids-d
// X86_64-SAME: {{^}}, emeraldrapids
// X86_64-SAME: {{^}}, clearwaterforest
// X86_64-SAME: {{^}}, diamondrapids
// X86_64-SAME: {{^}}, knl
// X86_64-SAME: {{^}}, knm
// X86_64-SAME: {{^}}, k8
Expand Down Expand Up @@ -250,6 +252,7 @@
// TUNE_X86-SAME: {{^}}, graniterapids-d
// TUNE_X86-SAME: {{^}}, emeraldrapids
// TUNE_X86-SAME: {{^}}, clearwaterforest
// TUNE_X86-SAME: {{^}}, diamondrapids
// TUNE_X86-SAME: {{^}}, knl
// TUNE_X86-SAME: {{^}}, knm
// TUNE_X86-SAME: {{^}}, lakemont
Expand Down Expand Up @@ -352,6 +355,7 @@
// TUNE_X86_64-SAME: {{^}}, graniterapids-d
// TUNE_X86_64-SAME: {{^}}, emeraldrapids
// TUNE_X86_64-SAME: {{^}}, clearwaterforest
// TUNE_X86_64-SAME: {{^}}, diamondrapids
// TUNE_X86_64-SAME: {{^}}, knl
// TUNE_X86_64-SAME: {{^}}, knm
// TUNE_X86_64-SAME: {{^}}, lakemont
Expand Down
42 changes: 42 additions & 0 deletions clang/test/Preprocessor/predefined-arch-macros.c
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Expand Up @@ -1867,13 +1867,18 @@
// RUN: %clang -march=graniterapids-d -m32 -E -dM %s -o - 2>&1 \
// RUN: --target=i386 \
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_GNR_M32,CHECK_GNRD_M32
// RUN: %clang -march=diamondrapids -m32 -E -dM %s -o - 2>&1 \
// RUN: --target=i386 \
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_GNR_M32,CHECK_GNRD_M32,CHECK_DMR_M32
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@RKSimon RKSimon Nov 1, 2024

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This 'overlay' approach feels a bit unwieldy - but I have not strong objections.

// CHECK_GNR_M32: #define __AES__ 1
// CHECK_GNR_M32: #define __AMX_BF16__ 1
// CHECK_GNR_M32-NOT: #define __AMX_COMPLEX__ 1
// CHECK_GNRD_M32: #define __AMX_COMPLEX__ 1
// CHECK_GNR_M32: #define __AMX_FP16__ 1
// CHECK_GNR_M32: #define __AMX_INT8__ 1
// CHECK_GNR_M32: #define __AMX_TILE__ 1
// CHECK_DMR_M32: #define __AVX10_2_512__ 1
// CHECK_DMR_M32: #define __AVX10_2__ 1
// CHECK_GNR_M32: #define __AVX2__ 1
// CHECK_GNR_M32: #define __AVX512BF16__ 1
// CHECK_GNR_M32: #define __AVX512BITALG__ 1
Expand All @@ -1888,13 +1893,21 @@
// CHECK_GNR_M32: #define __AVX512VL__ 1
// CHECK_GNR_M32: #define __AVX512VNNI__ 1
// CHECK_GNR_M32: #define __AVX512VPOPCNTDQ__ 1
// CHECK_DMR_M32: #define __AVXIFMA__ 1
// CHECK_DMR_M32: #define __AVXNECONVERT__ 1
// CHECK_DMR_M32: #define __AVXVNNIINT16__ 1
// CHECK_DMR_M32: #define __AVXVNNIINT8__ 1
// CHECK_GNR_M32: #define __AVXVNNI__ 1
// CHECK_GNR_M32: #define __AVX__ 1
// CHECK_GNR_M32: #define __BMI2__ 1
// CHECK_GNR_M32: #define __BMI__ 1
// CHECK_DMR_M32: #define __CCMP__ 1
// CHECK_DMR_M32: #define __CF__ 1
// CHECK_GNR_M32: #define __CLDEMOTE__ 1
// CHECK_GNR_M32: #define __CLFLUSHOPT__ 1
// CHECK_GNR_M32: #define __CLWB__ 1
// CHECK_DMR_M32: #define __CMPCCXADD__ 1
// CHECK_DMR_M32: #define __EGPR__ 1
// CHECK_GNR_M32: #define __ENQCMD__ 1
// CHECK_GNR_M32: #define __EVEX256__ 1
// CHECK_GNR_M32: #define __EVEX512__ 1
Expand All @@ -1905,20 +1918,27 @@
// CHECK_GNR_M32: #define __LZCNT__ 1
// CHECK_GNR_M32: #define __MMX__ 1
// CHECK_GNR_M32: #define __MOVBE__ 1
// CHECK_DMR_M32: #define __NDD__ 1
// CHECK_DMR_M32: #define __NF__ 1
// CHECK_GNR_M32: #define __PCLMUL__ 1
// CHECK_GNR_M32: #define __PCONFIG__ 1
// CHECK_GNR_M32: #define __PKU__ 1
// CHECK_GNR_M32: #define __POPCNT__ 1
// CHECK_DMR_M32: #define __PPX__ 1
// CHECK_GNR_M32: #define __PREFETCHI__ 1
// CHECK_GNR_M32: #define __PRFCHW__ 1
// CHECK_GNR_M32: #define __PTWRITE__ 1
// CHECK_DMR_M32: #define __PUSH2POP2__ 1
// CHECK_GNR_M32: #define __RDPID__ 1
// CHECK_GNR_M32: #define __RDRND__ 1
// CHECK_GNR_M32: #define __RDSEED__ 1
// CHECK_GNR_M32: #define __SERIALIZE__ 1
// CHECK_GNR_M32: #define __SGX__ 1
// CHECK_DMR_M32: #define __SHA512__ 1
// CHECK_GNR_M32: #define __SHA__ 1
// CHECK_GNR_M32: #define __SHSTK__ 1
// CHECK_DMR_M32: #define __SM3__ 1
// CHECK_DMR_M32: #define __SM4__ 1
// CHECK_GNR_M32: #define __SSE2__ 1
// CHECK_GNR_M32: #define __SSE3__ 1
// CHECK_GNR_M32: #define __SSE4_1__ 1
Expand All @@ -1935,6 +1955,7 @@
// CHECK_GNR_M32: #define __XSAVEOPT__ 1
// CHECK_GNR_M32: #define __XSAVES__ 1
// CHECK_GNR_M32: #define __XSAVE__ 1
// CHECK_DMR_M32: #define __ZU__ 1
// CHECK_GNR_M32: #define __corei7 1
// CHECK_GNR_M32: #define __corei7__ 1
// CHECK_GNR_M32: #define __i386 1
Expand All @@ -1948,13 +1969,18 @@
// RUN: %clang -march=graniterapids-d -m64 -E -dM %s -o - 2>&1 \
// RUN: --target=x86_64 \
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_GNR_M64,CHECK_GNRD_M64
// RUN: %clang -march=diamondrapids -m64 -E -dM %s -o - 2>&1 \
// RUN: --target=x86_64 \
// RUN: | FileCheck -match-full-lines %s -check-prefixes=CHECK_GNR_M64,CHECK_GNRD_M64,CHECK_DMR_M64
// CHECK_GNR_M64: #define __AES__ 1
// CHECK_GNR_M64: #define __AMX_BF16__ 1
// CHECK_GNR_M64-NOT: #define __AMX_COMPLEX__ 1
// CHECK_GNRD_M64: #define __AMX_COMPLEX__ 1
// CHECK_GNR_M64: #define __AMX_FP16__ 1
// CHECK_GNR_M64: #define __AMX_INT8__ 1
// CHECK_GNR_M64: #define __AMX_TILE__ 1
// CHECK_DMR_M64: #define __AVX10_2_512__ 1
// CHECK_DMR_M64: #define __AVX10_2__ 1
// CHECK_GNR_M64: #define __AVX2__ 1
// CHECK_GNR_M64: #define __AVX512BF16__ 1
// CHECK_GNR_M64: #define __AVX512BITALG__ 1
Expand All @@ -1969,13 +1995,21 @@
// CHECK_GNR_M64: #define __AVX512VL__ 1
// CHECK_GNR_M64: #define __AVX512VNNI__ 1
// CHECK_GNR_M64: #define __AVX512VPOPCNTDQ__ 1
// CHECK_DMR_M64: #define __AVXIFMA__ 1
// CHECK_DMR_M64: #define __AVXNECONVERT__ 1
// CHECK_DMR_M64: #define __AVXVNNIINT16__ 1
// CHECK_DMR_M64: #define __AVXVNNIINT8__ 1
// CHECK_GNR_M64: #define __AVXVNNI__ 1
// CHECK_GNR_M64: #define __AVX__ 1
// CHECK_GNR_M64: #define __BMI2__ 1
// CHECK_GNR_M64: #define __BMI__ 1
// CHECK_DMR_M64: #define __CCMP__ 1
// CHECK_DMR_M64: #define __CF__ 1
// CHECK_GNR_M64: #define __CLDEMOTE__ 1
// CHECK_GNR_M64: #define __CLFLUSHOPT__ 1
// CHECK_GNR_M64: #define __CLWB__ 1
// CHECK_DMR_M64: #define __CMPCCXADD__ 1
// CHECK_DMR_M64: #define __EGPR__ 1
// CHECK_GNR_M64: #define __ENQCMD__ 1
// CHECK_GNR_M64: #define __EVEX256__ 1
// CHECK_GNR_M64: #define __EVEX512__ 1
Expand All @@ -1986,20 +2020,27 @@
// CHECK_GNR_M64: #define __LZCNT__ 1
// CHECK_GNR_M64: #define __MMX__ 1
// CHECK_GNR_M64: #define __MOVBE__ 1
// CHECK_DMR_M64: #define __NDD__ 1
// CHECK_DMR_M64: #define __NF__ 1
// CHECK_GNR_M64: #define __PCLMUL__ 1
// CHECK_GNR_M64: #define __PCONFIG__ 1
// CHECK_GNR_M64: #define __PKU__ 1
// CHECK_GNR_M64: #define __POPCNT__ 1
// CHECK_DMR_M64: #define __PPX__ 1
// CHECK_GNR_M64: #define __PREFETCHI__ 1
// CHECK_GNR_M64: #define __PRFCHW__ 1
// CHECK_GNR_M64: #define __PTWRITE__ 1
// CHECK_DMR_M64: #define __PUSH2POP2__ 1
// CHECK_GNR_M64: #define __RDPID__ 1
// CHECK_GNR_M64: #define __RDRND__ 1
// CHECK_GNR_M64: #define __RDSEED__ 1
// CHECK_GNR_M64: #define __SERIALIZE__ 1
// CHECK_GNR_M64: #define __SGX__ 1
// CHECK_DMR_M64: #define __SHA512__ 1
// CHECK_GNR_M64: #define __SHA__ 1
// CHECK_GNR_M64: #define __SHSTK__ 1
// CHECK_DMR_M64: #define __SM3__ 1
// CHECK_DMR_M64: #define __SM4__ 1
// CHECK_GNR_M64: #define __SSE2__ 1
// CHECK_GNR_M64: #define __SSE3__ 1
// CHECK_GNR_M64: #define __SSE4_1__ 1
Expand All @@ -2016,6 +2057,7 @@
// CHECK_GNR_M64: #define __XSAVEOPT__ 1
// CHECK_GNR_M64: #define __XSAVES__ 1
// CHECK_GNR_M64: #define __XSAVE__ 1
// CHECK_DMR_M64: #define __ZU__ 1
// CHECK_GNR_M64: #define __amd64 1
// CHECK_GNR_M64: #define __amd64__ 1
// CHECK_GNR_M64: #define __corei7 1
Expand Down
14 changes: 14 additions & 0 deletions compiler-rt/lib/builtins/cpu_model/x86.c
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Expand Up @@ -103,6 +103,7 @@ enum ProcessorSubtypes {
INTEL_COREI7_ARROWLAKE_S,
INTEL_COREI7_PANTHERLAKE,
AMDFAM1AH_ZNVER5,
INTEL_COREI7_DIAMONDRAPIDS,
CPU_SUBTYPE_MAX
};

Expand Down Expand Up @@ -600,6 +601,19 @@ static const char *getIntelProcessorTypeAndSubtype(unsigned Family,
break;
}
break;
case 19:
switch (Model) {
// Diamondrapids:
case 0x01:
CPU = "diamondrapids";
*Type = INTEL_COREI7;
*Subtype = INTEL_COREI7_DIAMONDRAPIDS;
break;

default: // Unknown family 0x13 CPU.
break;
}
break;
default:
break; // Unknown.
}
Expand Down
2 changes: 2 additions & 0 deletions llvm/docs/ReleaseNotes.md
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Expand Up @@ -224,6 +224,8 @@ Changes to the X86 Backend

* Supported ISA of `MSR_IMM`.

* Supported ``-mcpu=diamondrapids``

Changes to the OCaml bindings
-----------------------------

Expand Down
1 change: 1 addition & 0 deletions llvm/include/llvm/TargetParser/X86TargetParser.def
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Expand Up @@ -107,6 +107,7 @@ X86_CPU_SUBTYPE(INTEL_COREI7_ARROWLAKE, "arrowlake")
X86_CPU_SUBTYPE(INTEL_COREI7_ARROWLAKE_S, "arrowlake-s")
X86_CPU_SUBTYPE(INTEL_COREI7_PANTHERLAKE, "pantherlake")
X86_CPU_SUBTYPE(AMDFAM1AH_ZNVER5, "znver5")
X86_CPU_SUBTYPE(INTEL_COREI7_DIAMONDRAPIDS, "diamondrapids")

// Alternate names supported by __builtin_cpu_is and target multiversioning.
X86_CPU_SUBTYPE_ALIAS(INTEL_COREI7_ALDERLAKE, "raptorlake")
Expand Down
1 change: 1 addition & 0 deletions llvm/include/llvm/TargetParser/X86TargetParser.h
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Expand Up @@ -121,6 +121,7 @@ enum CPUKind {
CK_GraniterapidsD,
CK_Emeraldrapids,
CK_Clearwaterforest,
CK_DiamondRapids,
CK_KNL,
CK_KNM,
CK_Lakemont,
Expand Down
24 changes: 24 additions & 0 deletions llvm/lib/Target/X86/X86.td
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Expand Up @@ -1139,6 +1139,28 @@ def ProcessorFeatures {
list<SubtargetFeature> GNRDFeatures =
!listconcat(GNRFeatures, GNRDAdditionalFeatures);

// Diamondrapids
list<SubtargetFeature> DMRAdditionalFeatures = [FeatureAVX10_2_512,
FeatureAMXCOMPLEX,
FeatureSM4,
FeatureCMPCCXADD,
FeatureAVXIFMA,
FeatureAVXNECONVERT,
FeatureAVXVNNIINT8,
FeatureAVXVNNIINT16,
FeatureSHA512,
FeatureSM3,
FeatureEGPR,
FeatureZU,
FeatureCCMP,
FeaturePush2Pop2,
FeaturePPX,
FeatureNDD,
FeatureNF,
FeatureCF];
list<SubtargetFeature> DMRFeatures =
!listconcat(GNRDFeatures, DMRAdditionalFeatures);

// Atom
list<SubtargetFeature> AtomFeatures = [FeatureX87,
FeatureCX8,
Expand Down Expand Up @@ -1840,6 +1862,8 @@ foreach P = ["graniterapids-d", "graniterapids_d"] in {
def : ProcModel<P, SapphireRapidsModel,
ProcessorFeatures.GNRDFeatures, ProcessorFeatures.GNRTuning>;
}
def : ProcModel<"diamondrapids", SapphireRapidsModel,
ProcessorFeatures.DMRFeatures, ProcessorFeatures.GNRTuning>;

// AMD CPUs.

Expand Down
13 changes: 13 additions & 0 deletions llvm/lib/TargetParser/Host.cpp
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Expand Up @@ -1006,6 +1006,19 @@ static StringRef getIntelProcessorTypeAndSubtype(unsigned Family,
CPU = "pentium4";
break;
}
case 19:
switch (Model) {
// Diamondrapids:
case 0x01:
CPU = "diamondrapids";
*Type = X86::INTEL_COREI7;
*Subtype = X86::INTEL_COREI7_DIAMONDRAPIDS;
break;

default: // Unknown family 0x13 CPU.
break;
}
break;
default:
break; // Unknown.
}
Expand Down
8 changes: 8 additions & 0 deletions llvm/lib/TargetParser/X86TargetParser.cpp
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Expand Up @@ -138,6 +138,12 @@ constexpr FeatureBitset FeaturesSapphireRapids =
FeatureWAITPKG;
constexpr FeatureBitset FeaturesGraniteRapids =
FeaturesSapphireRapids | FeatureAMX_FP16 | FeaturePREFETCHI;
constexpr FeatureBitset FeaturesDiamondRapids =
FeaturesGraniteRapids | FeatureAMX_COMPLEX | FeatureAVX10_2_512 |
FeatureCMPCCXADD | FeatureAVXIFMA | FeatureAVXNECONVERT |
FeatureAVXVNNIINT8 | FeatureAVXVNNIINT16 | FeatureSHA512 | FeatureSM3 |
FeatureSM4 | FeatureEGPR | FeatureZU | FeatureCCMP | FeaturePush2Pop2 |
FeaturePPX | FeatureNDD | FeatureNF | FeatureCF;

// Intel Atom processors.
// Bonnell has feature parity with Core2 and adds MOVBE.
Expand Down Expand Up @@ -381,6 +387,8 @@ constexpr ProcInfo Processors[] = {
{ {"emeraldrapids"}, CK_Emeraldrapids, FEATURE_AVX512FP16, FeaturesSapphireRapids, 'n', false },
// Clearwaterforest microarchitecture based processors.
{ {"clearwaterforest"}, CK_Lunarlake, FEATURE_AVX2, FeaturesClearwaterforest, 'p', false },
// Diamondrapids microarchitecture based processors.
{ {"diamondrapids"}, CK_DiamondRapids, FEATURE_AVX10_2_512, FeaturesDiamondRapids, 'z', false },
// Knights Landing processor.
{ {"knl"}, CK_KNL, FEATURE_AVX512F, FeaturesKNL, 'Z', false },
{ {"mic_avx512"}, CK_KNL, FEATURE_AVX512F, FeaturesKNL, 'Z', true },
Expand Down
2 changes: 2 additions & 0 deletions llvm/test/CodeGen/X86/cpus-intel.ll
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Expand Up @@ -39,6 +39,7 @@
; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=gracemont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pantherlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=clearwaterforest 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=diamondrapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty

; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nocona 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
Expand Down Expand Up @@ -104,6 +105,7 @@
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=gracemont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pantherlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=clearwaterforest 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=diamondrapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty

define void @foo() {
ret void
Expand Down
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