[lldb] Support riscv32 ELF corefiles

lldb/source/Plugins/Process/Utility/CMakeLists.txt

@@ -43,6 +43,7 @@ add_lldb_library(lldbPluginProcessUtility
   RegisterContextPOSIX_arm64.cpp
   RegisterContextPOSIX_loongarch64.cpp
   RegisterContextPOSIX_mips64.cpp
+  RegisterContextPOSIX_riscv32.cpp
   RegisterContextPOSIX_powerpc.cpp
   RegisterContextPOSIX_ppc64le.cpp
   RegisterContextPOSIX_riscv64.cpp
@@ -57,6 +58,7 @@ add_lldb_library(lldbPluginProcessUtility
   RegisterInfoPOSIX_arm64.cpp
   RegisterInfoPOSIX_loongarch64.cpp
   RegisterInfoPOSIX_ppc64le.cpp
+  RegisterInfoPOSIX_riscv32.cpp
   RegisterInfoPOSIX_riscv64.cpp
   StopInfoMachException.cpp
   ThreadMemory.cpp

lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv32.cpp

@@ -0,0 +1,81 @@
+//===-- RegisterContextPOSIX_riscv32.cpp ------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "RegisterContextPOSIX_riscv32.h"
+#include "lldb/Target/Process.h"
+#include "lldb/Target/Target.h"
+#include "lldb/Target/Thread.h"
+#include "lldb/Utility/DataBufferHeap.h"
+#include "lldb/Utility/DataExtractor.h"
+#include "lldb/Utility/Endian.h"
+#include "lldb/Utility/RegisterValue.h"
+#include "lldb/Utility/Scalar.h"
+#include "llvm/Support/Compiler.h"
+
+using namespace lldb;
+using namespace lldb_private;
+
+RegisterContextPOSIX_riscv32::RegisterContextPOSIX_riscv32(
+    lldb_private::Thread &thread,
+    std::unique_ptr<RegisterInfoPOSIX_riscv32> register_info)
+    : lldb_private::RegisterContext(thread, 0),
+      m_register_info_up(std::move(register_info)) {}
+
+RegisterContextPOSIX_riscv32::~RegisterContextPOSIX_riscv32() = default;
+
+void RegisterContextPOSIX_riscv32::invalidate() {}
+
+void RegisterContextPOSIX_riscv32::InvalidateAllRegisters() {}
+
+size_t RegisterContextPOSIX_riscv32::GetRegisterCount() {
+  return m_register_info_up->GetRegisterCount();
+}
+
+size_t RegisterContextPOSIX_riscv32::GetGPRSize() {
+  return m_register_info_up->GetGPRSize();
+}
+
+unsigned RegisterContextPOSIX_riscv32::GetRegisterSize(unsigned int reg) {
+  return m_register_info_up->GetRegisterInfo()[reg].byte_size;
+}
+
+unsigned RegisterContextPOSIX_riscv32::GetRegisterOffset(unsigned int reg) {
+  return m_register_info_up->GetRegisterInfo()[reg].byte_offset;
+}
+
+const lldb_private::RegisterInfo *
+RegisterContextPOSIX_riscv32::GetRegisterInfoAtIndex(size_t reg) {
+  if (reg < GetRegisterCount())
+    return &GetRegisterInfo()[reg];
+
+  return nullptr;
+}
+
+size_t RegisterContextPOSIX_riscv32::GetRegisterSetCount() {
+  return m_register_info_up->GetRegisterCount();
+}
+
+const lldb_private::RegisterSet *
+RegisterContextPOSIX_riscv32::GetRegisterSet(size_t set) {
+  return m_register_info_up->GetRegisterSet(set);
+}
+
+const lldb_private::RegisterInfo *
+RegisterContextPOSIX_riscv32::GetRegisterInfo() {
+  return m_register_info_up->GetRegisterInfo();
+}
+
+bool RegisterContextPOSIX_riscv32::IsGPR(unsigned int reg) {
+  return m_register_info_up->GetRegisterSetFromRegisterIndex(reg) ==
+         RegisterInfoPOSIX_riscv32::eRegsetMaskDefault;
+}
+
+bool RegisterContextPOSIX_riscv32::IsFPR(unsigned int reg) {
+  return m_register_info_up->GetRegisterSetFromRegisterIndex(reg) ==
+         RegisterInfoPOSIX_riscv32::eRegsetMaskFP;
+}

lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv32.h

@@ -0,0 +1,63 @@
+//===-- RegisterContextPOSIX_riscv32.h --------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_RISCV32_H
+#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_RISCV32_H
+
+#include "RegisterInfoInterface.h"
+#include "RegisterInfoPOSIX_riscv32.h"
+#include "lldb-riscv-register-enums.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/Utility/Log.h"
+
+class RegisterContextPOSIX_riscv32 : public lldb_private::RegisterContext {
+public:
+  RegisterContextPOSIX_riscv32(
+      lldb_private::Thread &thread,
+      std::unique_ptr<RegisterInfoPOSIX_riscv32> register_info);
+
+  ~RegisterContextPOSIX_riscv32() override;
+
+  void invalidate();
+
+  void InvalidateAllRegisters() override;
+
+  size_t GetRegisterCount() override;
+
+  virtual size_t GetGPRSize();
+
+  virtual unsigned GetRegisterSize(unsigned reg);
+
+  virtual unsigned GetRegisterOffset(unsigned reg);
+
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+  size_t GetRegisterSetCount() override;
+
+  const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
+
+protected:
+  std::unique_ptr<RegisterInfoPOSIX_riscv32> m_register_info_up;
+
+  virtual const lldb_private::RegisterInfo *GetRegisterInfo();
+
+  bool IsGPR(unsigned reg);
+
+  bool IsFPR(unsigned reg);
+
+  size_t GetFPRSize() { return sizeof(RegisterInfoPOSIX_riscv32::FPR); }
+
+  uint32_t GetRegNumFCSR() const { return fpr_fcsr_riscv; }
+
+  virtual bool ReadGPR() = 0;
+  virtual bool ReadFPR() = 0;
+  virtual bool WriteGPR() = 0;
+  virtual bool WriteFPR() = 0;
+};
+
+#endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_RISCV32_H

lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv32.cpp

@@ -0,0 +1,142 @@
+//===-- RegisterInfoPOSIX_riscv32.cpp -------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===---------------------------------------------------------------------===//
+
+#include "RegisterInfoPOSIX_riscv32.h"
+#include "lldb/Utility/Flags.h"
+#include "lldb/lldb-defines.h"
+#include "llvm/Support/Compiler.h"
+
+#include <cassert>
+#include <stddef.h>
+
+#define GPR_OFFSET(idx) ((idx) * 4 + 0)
+#define FPR_OFFSET(idx) ((idx) * 4 + sizeof(RegisterInfoPOSIX_riscv32::GPR))
+
+#define REG_CONTEXT_SIZE                                                       \
+  (sizeof(RegisterInfoPOSIX_riscv32::GPR) +                                    \
+   sizeof(RegisterInfoPOSIX_riscv32::FPR))
+
+#define DECLARE_REGISTER_INFOS_RISCV32_STRUCT
+#include "RegisterInfos_riscv32.h"
+#undef DECLARE_REGISTER_INFOS_RISCV32_STRUCT
+
+const lldb_private::RegisterInfo *RegisterInfoPOSIX_riscv32::GetRegisterInfoPtr(
+    const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::riscv32:
+    return g_register_infos_riscv32_le;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return nullptr;
+  }
+}
+
+uint32_t RegisterInfoPOSIX_riscv32::GetRegisterInfoCount(
+    const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::riscv32:
+    return static_cast<uint32_t>(sizeof(g_register_infos_riscv32_le) /
+                                 sizeof(g_register_infos_riscv32_le[0]));
+  default:
+    assert(false && "Unhandled target architecture.");
+    return 0;
+  }
+}
+
+// Number of register sets provided by this context.
+enum {
+  k_num_gpr_registers = gpr_last_riscv - gpr_first_riscv + 1,
+  k_num_fpr_registers = fpr_last_riscv - fpr_first_riscv + 1,
+  k_num_register_sets = 2
+};
+
+// RISC-V32 general purpose registers.
+static const uint32_t g_gpr_regnums_riscv32[] = {
+    gpr_pc_riscv,  gpr_ra_riscv,       gpr_sp_riscv,  gpr_x3_riscv,
+    gpr_x4_riscv,  gpr_x5_riscv,       gpr_x6_riscv,  gpr_x7_riscv,
+    gpr_fp_riscv,  gpr_x9_riscv,       gpr_x10_riscv, gpr_x11_riscv,
+    gpr_x12_riscv, gpr_x13_riscv,      gpr_x14_riscv, gpr_x15_riscv,
+    gpr_x16_riscv, gpr_x17_riscv,      gpr_x18_riscv, gpr_x19_riscv,
+    gpr_x20_riscv, gpr_x21_riscv,      gpr_x22_riscv, gpr_x23_riscv,
+    gpr_x24_riscv, gpr_x25_riscv,      gpr_x26_riscv, gpr_x27_riscv,
+    gpr_x28_riscv, gpr_x29_riscv,      gpr_x30_riscv, gpr_x31_riscv,
+    gpr_x0_riscv,  LLDB_INVALID_REGNUM};
+
+static_assert(((sizeof g_gpr_regnums_riscv32 /
+                sizeof g_gpr_regnums_riscv32[0]) -
+               1) == k_num_gpr_registers,
+              "g_gpr_regnums_riscv32 has wrong number of register infos");
+
+// RISC-V32 floating point registers.
+static const uint32_t g_fpr_regnums_riscv32[] = {
+    fpr_f0_riscv,   fpr_f1_riscv,       fpr_f2_riscv,  fpr_f3_riscv,
+    fpr_f4_riscv,   fpr_f5_riscv,       fpr_f6_riscv,  fpr_f7_riscv,
+    fpr_f8_riscv,   fpr_f9_riscv,       fpr_f10_riscv, fpr_f11_riscv,
+    fpr_f12_riscv,  fpr_f13_riscv,      fpr_f14_riscv, fpr_f15_riscv,
+    fpr_f16_riscv,  fpr_f17_riscv,      fpr_f18_riscv, fpr_f19_riscv,
+    fpr_f20_riscv,  fpr_f21_riscv,      fpr_f22_riscv, fpr_f23_riscv,
+    fpr_f24_riscv,  fpr_f25_riscv,      fpr_f26_riscv, fpr_f27_riscv,
+    fpr_f28_riscv,  fpr_f29_riscv,      fpr_f30_riscv, fpr_f31_riscv,
+    fpr_fcsr_riscv, LLDB_INVALID_REGNUM};
+
+static_assert(((sizeof g_fpr_regnums_riscv32 /
+                sizeof g_fpr_regnums_riscv32[0]) -
+               1) == k_num_fpr_registers,
+              "g_fpr_regnums_riscv32 has wrong number of register infos");
+
+// Register sets for RISC-V32.
+static const lldb_private::RegisterSet g_reg_sets_riscv32[k_num_register_sets] =
+    {{"General Purpose Registers", "gpr", k_num_gpr_registers,
+      g_gpr_regnums_riscv32},
+     {"Floating Point Registers", "fpr", k_num_fpr_registers,
+      g_fpr_regnums_riscv32}};
+
+RegisterInfoPOSIX_riscv32::RegisterInfoPOSIX_riscv32(
+    const lldb_private::ArchSpec &target_arch, lldb_private::Flags opt_regsets)
+    : lldb_private::RegisterInfoAndSetInterface(target_arch),
+      m_register_info_p(GetRegisterInfoPtr(target_arch)),
+      m_register_info_count(GetRegisterInfoCount(target_arch)),
+      m_opt_regsets(opt_regsets) {}
+
+uint32_t RegisterInfoPOSIX_riscv32::GetRegisterCount() const {
+  return m_register_info_count;
+}
+
+size_t RegisterInfoPOSIX_riscv32::GetGPRSize() const {
+  return sizeof(struct RegisterInfoPOSIX_riscv32::GPR);
+}
+
+size_t RegisterInfoPOSIX_riscv32::GetFPRSize() const {
+  return sizeof(struct RegisterInfoPOSIX_riscv32::FPR);
+}
+
+const lldb_private::RegisterInfo *
+RegisterInfoPOSIX_riscv32::GetRegisterInfo() const {
+  return m_register_info_p;
+}
+
+size_t RegisterInfoPOSIX_riscv32::GetRegisterSetCount() const {
+  return k_num_register_sets;
+}
+
+size_t RegisterInfoPOSIX_riscv32::GetRegisterSetFromRegisterIndex(
+    uint32_t reg_index) const {
+  // coverity[unsigned_compare]
+  if (reg_index >= gpr_first_riscv && reg_index <= gpr_last_riscv)
+    return eRegsetMaskDefault;
+  if (reg_index >= fpr_first_riscv && reg_index <= fpr_last_riscv)
+    return eRegsetMaskFP;
+  return LLDB_INVALID_REGNUM;
+}
+
+const lldb_private::RegisterSet *
+RegisterInfoPOSIX_riscv32::GetRegisterSet(size_t set_index) const {
+  if (set_index < GetRegisterSetCount())
+    return &g_reg_sets_riscv32[set_index];
+  return nullptr;
+}

lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv32.h

@@ -0,0 +1,71 @@
+//===-- RegisterInfoPOSIX_riscv32.h -----------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_RISCV32_H
+#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_RISCV32_H
+
+#include "RegisterInfoAndSetInterface.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/Utility/Flags.h"
+#include "lldb/lldb-private.h"
+
+#include <map>
+
+class RegisterInfoPOSIX_riscv32
+    : public lldb_private::RegisterInfoAndSetInterface {
+public:
+  static const lldb_private::RegisterInfo *
+  GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch);
+  static uint32_t
+  GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch);
+
+public:
+  // RISC-V32 register set mask value
+  enum {
+    eRegsetMaskDefault = 0,
+    eRegsetMaskFP = 1,
+    eRegsetMaskAll = -1,
+  };
+
+  struct GPR {
+    // gpr[0] is pc, not x0, which is the zero register.
+    uint32_t gpr[32];
+  };
+
+  struct FPR {
+    uint32_t fpr[32];
+    uint32_t fcsr;
+  };
+
+  RegisterInfoPOSIX_riscv32(const lldb_private::ArchSpec &target_arch,
+                            lldb_private::Flags flags);
+
+  size_t GetGPRSize() const override;
+
+  size_t GetFPRSize() const override;
+
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
+
+  uint32_t GetRegisterCount() const override;
+
+  const lldb_private::RegisterSet *
+  GetRegisterSet(size_t reg_set) const override;
+
+  size_t GetRegisterSetCount() const override;
+
+  size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const override;
+
+  bool IsFPPresent() const { return m_opt_regsets.AnySet(eRegsetMaskFP); }
+
+private:
+  const lldb_private::RegisterInfo *m_register_info_p;
+  uint32_t m_register_info_count;
+  lldb_private::Flags m_opt_regsets;
+};
+
+#endif

lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.cpp

@@ -6,14 +6,13 @@
 //
 //===---------------------------------------------------------------------===//
 
-#include <cassert>
-#include <lldb/Utility/Flags.h>
-#include <stddef.h>
-
+#include "RegisterInfoPOSIX_riscv64.h"
+#include "lldb/Utility/Flags.h"
 #include "lldb/lldb-defines.h"
 #include "llvm/Support/Compiler.h"
 
-#include "RegisterInfoPOSIX_riscv64.h"
+#include <cassert>
+#include <stddef.h>
 
 #define GPR_OFFSET(idx) ((idx)*8 + 0)
 #define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_riscv64::GPR))